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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-09-04 11:32:25 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-20 16:28:46 +0000 |
| commit | f6dbf4a46a44e3cc63fa734d9a77e3bc6e622aa8 (patch) | |
| tree | 5027712b4f263dc67c7ecb2463819b90734d0c4b /Makefile | |
| parent | e0fd9a60e7a869eed8bf368afe1e1ab6e6da7a6c (diff) | |
| download | coreboot-f6dbf4a46a44e3cc63fa734d9a77e3bc6e622aa8.tar.xz | |
soc/amd/common/lpc: Add SuperIO decode function
The LPC-ISA bridge supports two ranges for SuperIO control registers.
Add a generic function to allow a mainboard to enable the appropriate
range. Provide #define values that are more descriptive than the
register's field names.
Change-Id: Ic5445cfc137604cb1bb3ee3ea4c3a4ebdb9a9cab
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35271
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions