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author | Aaron Durbin <adurbin@chromium.org> | 2016-07-18 11:24:36 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-19 20:18:34 +0200 |
commit | f0ec82450b86112d8e95b38d91d58f9afdbbb846 (patch) | |
tree | d6c6f959ba39957ca9dbaff82947d1190070df97 /README | |
parent | ec065e8096caa908b177fb8882eea9b07840b895 (diff) | |
download | coreboot-f0ec82450b86112d8e95b38d91d58f9afdbbb846.tar.xz |
drivers/intel/fsp2_0: honor FSP revision for memory training data
Utilizing the FSP revision while saving the memory training data is
important because it means when the FSP is updated the memory training
is redone. The previous implementation was just using '0' as a revision.
Because of that behavior a retrain would not have been done on an FSP
upgrade.
BUG=chrome-os-partner:52679
Change-Id: I1430bd78c770a840d2deff2476f47150c02cf27d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15744
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'README')
0 files changed, 0 insertions, 0 deletions