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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-05-21 14:43:45 -0500 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-06-03 22:35:37 +0200 |
| commit | f97ff3f72c038b711fd3c1e7b73abaa05add2094 (patch) | |
| tree | 3800923d64f0f0396a8aa935d962e67dc9438648 /README | |
| parent | 32610462d12bee4f901e7f5eefef63f200f22805 (diff) | |
| download | coreboot-f97ff3f72c038b711fd3c1e7b73abaa05add2094.tar.xz | |
dram: Add utilities for decoding DDR3 SPDs
Add convenience utilities for decoding DDR3 SPDs and printing the
information to the console. These have proven invaluable when writing the
VX900 memory initialization.
These are used in the VX900 branch
Information printed has the following format:
> SPD Data for DIMM 51
> Revision: 10
> Type : b
> Key : 2
> Banks : 8
> Capacity: 1 Gb
> Supported voltages: 1.5V
> SDRAM width : 8
> Bus extension : 0 bits
> Bus width : 64
> Optional features : DLL-Off_mode RZQ/7 RZQ/6
> Thermal features : ASR ext_temp_range
> Thermal sensor : no
> Standard SDRAM : no
> Row addr bits : 13
> Column addr bits : 10
> Number of ranks : 1
> DIMM Capacity : 1024 MB
> CAS latencies : 6 7 8 9
> tCKmin : 1.500 ns
> tAAmin : 13.125 ns
> tWRmin : 15.000 ns
> tRCDmin : 13.125 ns
> tRRDmin : 6.000 ns
> tRPmin : 13.125 ns
> tRASmin : 36.000 ns
> tRCmin : 49.125 ns
> tRFCmin : 110.000 ns
> tWTRmin : 7.500 ns
> tRTPmin : 7.500 ns
> tFAWmin : 30.000 ns
Change-Id: I30725a75caf74ac637db0a143344562bd9910466
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/3267
Tested-by: build bot (Jenkins)
Diffstat (limited to 'README')
0 files changed, 0 insertions, 0 deletions