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authorVladimir Serbinenko <phcoder@gmail.com>2014-01-04 20:58:55 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-01-06 10:06:21 +0100
commite51210dbaeafb91d9eb03eddcd061cfc94a48eab (patch)
tree406b3e85908393076dca7ce51b96cc0bfd2c522e /README
parent00ea28ecf9a9524824c652cd834428bf61fa62e8 (diff)
downloadcoreboot-e51210dbaeafb91d9eb03eddcd061cfc94a48eab.tar.xz
MRC cache: determine flash size on runtime
It should be possible to put coreboot compiled for smaller chip by putting it at the end of bigger chip. We already have chip size in flash->size. Use it. Tested on Lenovo X230. Change-Id: If8ff03ed72671a9f2745ed4e759a04e83aa7cc37 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4612 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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