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| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2018-06-13 14:09:22 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-06-30 03:39:07 +0000 |
| commit | a6b3b4dd8f52cf488263253eeac040574432cee2 (patch) | |
| tree | 897a2e0129e686cb3d40a5e19501446f2f3bdefb /configs/config.intel_galileo_gen2.fsp2.0 | |
| parent | d426c54c2703743b60ebd49357a21b958f33c303 (diff) | |
| download | coreboot-a6b3b4dd8f52cf488263253eeac040574432cee2.tar.xz | |
Documentation/soc/intel: Add common code design document
Add common code design document support Intel SoCs such as Skylake,
Cannonlake and Apollolake onwards.
Documented items:
*Introduction
*Design Principle
*Common code development and status
*Common code structure
*Benifits
Change-Id: I5ade390cfb41c72f812d5cc4e00e67a5964721de
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'configs/config.intel_galileo_gen2.fsp2.0')
0 files changed, 0 insertions, 0 deletions