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| author | Joe Moore <awokd@danwin1210.me> | 2019-12-31 05:20:24 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-04 16:08:09 +0000 |
| commit | a83958185564b2a89ad2053a96874bc883d234d7 (patch) | |
| tree | 7cb4660ea8a7a7bc7120c5ccbef6cc892056153d /configs/config.intel_harcuvar | |
| parent | c156b584ee820a703073ceda3eaf6cec6afc9966 (diff) | |
| download | coreboot-a83958185564b2a89ad2053a96874bc883d234d7.tar.xz | |
vc/amd/agesa: Delete mfParallelTraining.c
Potential for out-of-bounds read. However, this code is not
used on F14, F15tn, or F16kb platforms. As can be seen in
vc/amd/agesa/f15tn/Config/PlatformInstall.h only multiple
socket F10 is supported. Tested on Lenovo G505s.
Change-Id: Ib71fe32d89840b9f25619d74980e562fd626952b
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Found-by: Coverity CID 1241831
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38035
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'configs/config.intel_harcuvar')
0 files changed, 0 insertions, 0 deletions