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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2019-07-10 13:15:54 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-11 15:14:06 +0000 |
| commit | 1f21a96c842c285308fd0b433a578ce101483aa1 (patch) | |
| tree | 670d53d31be99ee8ce68536a80b265f23bfc7b7c /configs/config.pcengines_apu3 | |
| parent | badbcde5425b587fe23f8bd6ce02c740913fdd1d (diff) | |
| download | coreboot-1f21a96c842c285308fd0b433a578ce101483aa1.tar.xz | |
mb/siemens/{mc_apl1,...,mc_apl5}: Reduce eMMC bus speed mode
We need to reduce the eMMC bus speed for these Apollo Lake mainboards
because of a limitation on Intel side for industry use cases.
Change-Id: Ide6a1a302001c0752d149bfdab175a27c8f8cc35
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'configs/config.pcengines_apu3')
0 files changed, 0 insertions, 0 deletions