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| author | Aaron Durbin <adurbin@chromium.org> | 2013-03-22 22:16:58 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-29 19:54:08 +0100 |
| commit | 4fa5fa5088503ff5c168b4fb8d548dd90034d29e (patch) | |
| tree | 8811faa2b0e3bf5dd4bbc0831b8c8e2e92c3dc3f /documentation/AMD-S3.txt | |
| parent | a75561415e75d3a4dc813fc061140570e39b7078 (diff) | |
| download | coreboot-4fa5fa5088503ff5c168b4fb8d548dd90034d29e.tar.xz | |
resources: introduce IORESOURCE_WRCOMB
Certain MMIO resources can be set to a write-combining cacheable
mode to increase performance. Typical resources that use this would
be graphics memory.
Change-Id: Icd96c720f86f7e2f19a6461bb23cb323124eb68e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2891
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'documentation/AMD-S3.txt')
0 files changed, 0 insertions, 0 deletions