diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-23 18:48:27 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-23 18:48:27 +0000 |
| commit | 16db6c3486fba7292bade3233df96b4ab2ecc889 (patch) | |
| tree | e862728c6b0e9e6eb7e11fd8d1d813981d23df6b /documentation/POSTCODES | |
| parent | d6b4f1cd0ad43d29fe925a6cc6951f205a8ead50 (diff) | |
| download | coreboot-16db6c3486fba7292bade3233df96b4ab2ecc889.tar.xz | |
Whitespace/typo/cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'documentation/POSTCODES')
| -rw-r--r-- | documentation/POSTCODES | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/documentation/POSTCODES b/documentation/POSTCODES index 3c02f7f15d..85ad4d76f9 100644 --- a/documentation/POSTCODES +++ b/documentation/POSTCODES @@ -2,13 +2,13 @@ coreboot POST Codes ------------------------------------------------------------------------------- -This is an (incomplete) list of POST codes emitted by coreboot v2. +This is an (incomplete) list of POST codes emitted by coreboot v4. 0x10 Entry into protected mode 0x01 Entry into 'crt0.s' reset code jumps to here -0x11 Start copying LinuxBIOS to RAM with decompression if compressed +0x11 Start copying coreboot to RAM with decompression if compressed 0x12 Copy/decompression finished jumping to RAM -0x80 Entry into LinuxBIOS in RAM +0x80 Entry into coreboot in RAM 0x13 Entry into c_start 0xfe Pre call to hardwaremain() 0x39 Console is initialized |