summaryrefslogtreecommitdiff
path: root/documentation/RFC/chip.tex
diff options
context:
space:
mode:
authorOskar Enoksson <enok@lysator.liu.se>2011-10-06 18:21:19 +0200
committerMarc Jones <marcj303@gmail.com>2011-10-11 08:49:59 +0200
commit07bf9119310ceece5a6c76907004bc96af1a38cc (patch)
treece78f95e2a2cbecc508868c325fbadd56f57e353 /documentation/RFC/chip.tex
parent75df1062a1438c40bc94021982fd389848f1d7fc (diff)
downloadcoreboot-07bf9119310ceece5a6c76907004bc96af1a38cc.tar.xz
Fixed broken MTRR for >4GB memory on AMD K8 fam 0fh rev <=E
AMD K8 rev F and later implements a bit SYSCFG_MSR_TOM2WB to mark dram memory above 4GB as WB. However, AMD K8 rev E and earlier don't implement this bit and therefore need MTRR spanning dram memory above 4GB. The current implementation of amd_setup_mtrrs never generate MTRR above 4GB. This caused memory > 4GB not to be recognized in e.g. Linux on those rev E or older platforms. This commit should fix that bug. Signed-off-by: Oskar Enoksson <enok@lysator.liu.se> Change-Id: Ie568a52a8eb355969c86964d5afc4692e60f69c1 Reviewed-on: http://review.coreboot.org/238 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'documentation/RFC/chip.tex')
0 files changed, 0 insertions, 0 deletions