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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-09-22 09:43:25 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-09-22 09:43:25 +0000 |
| commit | 513e03bd96b9c2d2c3a9ad10961de4f76586ace3 (patch) | |
| tree | 1e355e1912744adb43d25a9896388907e5b071d7 /documentation/cbfs.txt | |
| parent | 00003ae7129802d7f943756c94b35372c1b1b053 (diff) | |
| download | coreboot-513e03bd96b9c2d2c3a9ad10961de4f76586ace3.tar.xz | |
r4646 enabled early usage of pci_{read,write}_config{8,16,32}
This allows us to change
dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
sm_dev->path.pci.devfn, 0x64);
to the much more readable
dword = pci_read_config32(sm_dev, 0x64);
Clean up all PCI operations in mainboards based on AMD 690:
amd/pistachio
amd/dbm690t
technexion/tim8690
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'documentation/cbfs.txt')
0 files changed, 0 insertions, 0 deletions