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authorRavi Sarawadi <ravishankar.sarawadi@intel.com>2019-12-16 23:23:27 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-01-18 11:19:03 +0000
commit954a5b50ad9d6ee31f0f0d7abe6badf412cbe9cc (patch)
tree03e6b598cef6e8d739269ae90d21c6c7b661b5d2 /gnat.adc
parent69855f2e609483b2cbe4aebf7fa6ca1dde0bfc30 (diff)
downloadcoreboot-954a5b50ad9d6ee31f0f0d7abe6badf412cbe9cc.tar.xz
soc/intel/tigerlake: Update ACPI files
Add and update ACPI files for Tiger Lake SoC Use ASL2.0 code syntax for new acpi(camera_clock_ctl.asl) Reference PCH EDS#576591 vol1 rev1.2 PCH EDS#575857 vol2 rev1.0 BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Change-Id: Ib82156830273c2937f5f02713ed7dd27da41c857 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37781 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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