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authorHung-Te Lin <hungte@chromium.org>2013-06-23 08:14:30 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 23:14:49 +0200
commite42030d23600990e95db2af1e9e1a366ff3d4ec7 (patch)
tree4ee819c17a7ffc6ce9c648431e2518bb81d69629 /payloads/bayou/lzmadecode.h
parent8b95c134207de9573f8e5eb758e5cee51741604a (diff)
downloadcoreboot-e42030d23600990e95db2af1e9e1a366ff3d4ec7.tar.xz
arm/exynos: Correct SPI session commands.
Some initialization / shutdown commands should be paired correctly in a SPI I/O session. For example, setting CS should be enabled and disabled in each read; and the bus width (byte or word) should be configured only when opening / closing the SPI device. Change-Id: Ie56b1c3a6df7d542f7ea8f1193ac435987f937ba Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3706 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads/bayou/lzmadecode.h')
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