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author | Petr Cvek <petrcvekcz@gmail.com> | 2019-10-01 04:01:21 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-03 15:24:42 +0000 |
commit | c49869b4249b89e21c2d106645029801cb01aaea (patch) | |
tree | 8f4339f5434b6d008241d430f5438c4c0c6c51e0 /payloads/coreinfo/ramdump_module.c | |
parent | be816858871d74cdff4e3744c18f6dedcf7c5ec4 (diff) | |
download | coreboot-c49869b4249b89e21c2d106645029801cb01aaea.tar.xz |
sb/intel/i82801gx: Use symbolic name for register, code rework
An original code had a wrong register address 0x27 for AHCI BAR.
The value was aligned incidentally by the code specific of
the pci_read_config32 function to the correct address 0x24.
All 0x24 values in sata.c were changed to the symbolic name
PCI_BASE_ADDRESS_5 and the code was optimized.
An equivalent code was tested on a real hardware.
Signed-off-by: Petr Cvek <petrcvekcz@gmail.com>
Change-Id: I33509befe86ff6e333c559c87a0f45886d737df9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35737
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/coreinfo/ramdump_module.c')
0 files changed, 0 insertions, 0 deletions