payload/tianocore: Fix patch to preserve coreboot table

Part of the original patch, commit 85a90e1, reverted edk2 commit:
1d7258f [CorebootModulePkg:Removing EFI_RESOURCE_ATTRIBUTE_TESTED]
which had the unintended effect of causing memory above 2GiB
from being unavailable (marked reserved) when booting without a
connected display (aka headles mode).

This commit strips the patch to only the component needed to fix
reading of the coreboot table low memory pointer.

TEST: boot 4GB google/panther without connected display, verify
memory above 2GB available via 'dmesg | grep BIOS-e820' and 'free -m'

Change-Id: I39327929f9b0b940fc12cdca1d744456fdc097e0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/23483
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 15 insertions, 41 deletions

diff --git a/payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch b/payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch
index 649c6ee315..e75052bc61 100644
--- a/payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch
+++ b/payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch
@@ -1,4 +1,4 @@
-From 07742664925f8d055505220258f2589a9c73a80b Mon Sep 17 00:00:00 2001
+From ef89b11ce6f93c96fbd1753a8006dd9c3da212e0 Mon Sep 17 00:00:00 2001
 From: ReddestDream <reddestdream@gmail.com>
 Date: Wed, 3 May 2017 00:13:28 -0400
 Subject: [PATCH] CbSupportPei: prevent lower coreboot table from being
@@ -7,46 +7,20 @@ Subject: [PATCH] CbSupportPei: prevent lower coreboot table from being
 Exclude the bottom 4kb from being included in System Memory HoB
 
 diff --git a/CorebootModulePkg/CbSupportPei/CbSupportPei.c b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
-index 262e6b9d7d..da8f060783 100755
+index 262e6b9..d3c5723 100755
 --- a/CorebootModulePkg/CbSupportPei/CbSupportPei.c
 +++ b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
-@@ -246,23 +246,20 @@ CbPeiEntryPoint (
-   UINTN                PmGpeEnBase;

-   CB_MEM_INFO          CbMemInfo;

- 

--  //

--  // Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED  

--  // is intentionally omitted to prevent erasing of the coreboot header  

--  // record before it is processed by CbParseMemoryInfo.

--  //

-   BuildResourceDescriptorHob (

-     EFI_RESOURCE_SYSTEM_MEMORY,

-     (

-     EFI_RESOURCE_ATTRIBUTE_PRESENT |

-     EFI_RESOURCE_ATTRIBUTE_INITIALIZED |

-+    EFI_RESOURCE_ATTRIBUTE_TESTED |

-     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |

-     EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |

-     EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |

-     EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE

-     ),

--    (EFI_PHYSICAL_ADDRESS)(0),

--    (UINT64)(0xA0000)

-+    // Lower 640KB, except for first 4KB where the lower coreboot pointer ("LBIO") resides

-+    (EFI_PHYSICAL_ADDRESS)(0 + 0x1000),

-+    (UINT64)(0xA0000 - 0x1000)

-     );

- 

- 

-@@ -309,7 +306,7 @@ CbPeiEntryPoint (
-   // Set cache on the physical memory

-   //

-   MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);

--  MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);

-+  MtrrSetMemoryAttribute ((0 + 0x1000), (0xA0000 - 0x1000), CacheWriteBack);

- 

-   //

-   // Create Memory Type Information HOB

--- 
-2.14.0
+@@ -261,8 +261,9 @@ CbPeiEntryPoint (
+     EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+     EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
+     ),
+-    (EFI_PHYSICAL_ADDRESS)(0),
+-    (UINT64)(0xA0000)
++    // Lower 640KB, except for first 4KB where the lower coreboot pointer ("LBIO") resides
++    (EFI_PHYSICAL_ADDRESS)(0 + 0x1000),
++    (UINT64)(0xA0000 - 0x1000)
+     );
+
 
+--
+2.14.0