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authorJulius Werner <jwerner@chromium.org>2014-05-15 19:41:52 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-01-09 07:05:15 +0100
commit092cac58dee8fb87e0615d060a9de0f7ec693ee4 (patch)
tree599b534e5afcc415d43ba55b6cbea9ccabadc42b /payloads/libpayload/arch/arm
parent43e10301c0ae481e97cfc84080bb0989a13174f4 (diff)
downloadcoreboot-092cac58dee8fb87e0615d060a9de0f7ec693ee4.tar.xz
libpayload: Rework exception hook interface
This patch makes some slight changes to the exception hook interface. The old code provides a different handler hook for every exception type... however, in practice all those hook functions often need to look very similar, so this creates more boilerplate than it removes. The new interface just allows for a single hook with the exception type passed as an argument, and the consumer can signal whether the exception was handled through the return value. (Right now this still only supports one consumer, but it could easily be extended to walk through a list of hooks if the need arises.) Also move the excepton state from an argument to a global. This avoids a lot of boilerplate since some consumers need to change the state from many places, so they would have to pass the same pointer around many times. It also removes the false suggestion that the exception state was not global and you could have multiple copies of it (which the exception core doesn't support for any architecture). On the ARM side, the exception state is separated from the exception stack for easier access. (This requires some assembly changes, and I threw in a few comments and corrected the immediate sigils from '$' to the official '#' while I'm there.) Since the exception state is now both stored and loaded through an indirection pointer, this allows for some very limited reentrance (you could point it to a different struct while handling an exception, and while you still won't be able to return to the outer-level exception from there, you could at least swap out the pointer and return back to System Mode in one go). BUG=chrome-os-partner:18390 TEST=Made sure normal exceptions still get dumped correctly on both archs. Original-Change-Id: I5d9a934fab7c14ccb2c9d7ee4b3465c825521fa2 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/202562 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit 97542110f0b385b9b8d89675866e65db8ca32aeb) Signed-off-by: Marc Jones <marc.jones@se-eng.com> *** Squashed to prevent build failures. *** libpayload: align arm64 with new exception handling model The exception handling was previously updated, however the arm64 changes raced with hat one. Make the arm64 align with the new model. Without these changes compilation will fail. BUG=None BRANCH=None TEST=Can build libpayload for rush. Original-Change-Id: I320b39a57b985d1f87446ea7757955664f8dba8f Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/204402 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 0080df41b311ef20f9214b386fa4e38ee54aa1a1) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I9a0bb3848cf5286f9f4bb08172a9f4a15278348e Reviewed-on: http://review.coreboot.org/8117 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads/libpayload/arch/arm')
-rw-r--r--payloads/libpayload/arch/arm/exception.c66
-rw-r--r--payloads/libpayload/arch/arm/exception_asm.S56
2 files changed, 57 insertions, 65 deletions
diff --git a/payloads/libpayload/arch/arm/exception.c b/payloads/libpayload/arch/arm/exception.c
index 45b77a7460..d100937295 100644
--- a/payloads/libpayload/arch/arm/exception.c
+++ b/payloads/libpayload/arch/arm/exception.c
@@ -33,22 +33,17 @@
#include <libpayload.h>
#include <stdint.h>
-uint8_t exception_stack[0x1000] __attribute__((aligned(8)));
-extern void *exception_stack_end;
+u32 exception_stack[0x400] __attribute__((aligned(8)));
+struct exception_state exception_state;
-struct exception_handler_info
-{
- const char *name;
- exception_hook hook;
-};
-
-static struct exception_handler_info exceptions[EXC_COUNT] = {
- [EXC_UNDEF] = { "_undefined_instruction" },
- [EXC_SWI] = { "_software_interrupt" },
- [EXC_PABORT] = { "_prefetch_abort" },
- [EXC_DABORT] = { "_data_abort" },
- [EXC_IRQ] = { "_irq" },
- [EXC_FIQ] = { "_fiq" },
+static exception_hook hook;
+static const char *names[EXC_COUNT] = {
+ [EXC_UNDEF] = "Undefined Instruction",
+ [EXC_SWI] = "Software Interrupt",
+ [EXC_PABORT] = "Prefetch Abort",
+ [EXC_DABORT] = "Data Abort",
+ [EXC_IRQ] = "Interrupt",
+ [EXC_FIQ] = "Fast Interrupt",
};
static void dump_stack(uintptr_t addr, size_t bytes)
@@ -66,7 +61,7 @@ static void dump_stack(uintptr_t addr, size_t bytes)
}
}
-static void print_regs(struct exception_state *state)
+static void print_regs(void)
{
int i;
@@ -81,30 +76,21 @@ static void print_regs(struct exception_state *state)
printf("IP");
else
printf("R%d", i);
- printf(" = 0x%08x\n", state->regs[i]);
+ printf(" = 0x%08x\n", exception_state.regs[i]);
}
- printf("CPSR = 0x%08x\n", state->cpsr);
+ printf("CPSR = 0x%08x\n", exception_state.cpsr);
}
-void exception_dispatch(struct exception_state *state, int idx);
-void exception_dispatch(struct exception_state *state, int idx)
+void exception_dispatch(u32 idx)
{
- if (idx >= EXC_COUNT) {
- printf("Bad exception index %d.\n", idx);
- } else {
- struct exception_handler_info *info = &exceptions[idx];
- if (info->hook) {
- info->hook(idx, state);
- return;
- }
+ die_if(idx >= EXC_COUNT || !names[idx], "Bad exception index %u!", idx);
- if (info->name)
- printf("exception %s\n", info->name);
- else
- printf("exception _not_used.\n");
- }
- print_regs(state);
- dump_stack(state->regs[13], 512);
+ if (hook && hook(idx))
+ return;
+
+ printf("%s Exception\n", names[idx]);
+ print_regs();
+ dump_stack(exception_state.regs[13], 512);
halt();
}
@@ -119,11 +105,13 @@ void exception_init(void)
extern uint32_t exception_table[];
set_vbar((uintptr_t)exception_table);
- exception_stack_end = exception_stack + sizeof(exception_stack);
+
+ exception_stack_end = exception_stack + ARRAY_SIZE(exception_stack);
+ exception_state_ptr = &exception_state;
}
-void exception_install_hook(int type, exception_hook hook)
+void exception_install_hook(exception_hook h)
{
- die_if(type >= EXC_COUNT, "Out of bounds exception index %d.\n", type);
- exceptions[type].hook = hook;
+ die_if(hook, "Implement support for a list of hooks if you need it.");
+ hook = h;
}
diff --git a/payloads/libpayload/arch/arm/exception_asm.S b/payloads/libpayload/arch/arm/exception_asm.S
index 7b722cb86f..8715955de2 100644
--- a/payloads/libpayload/arch/arm/exception_asm.S
+++ b/payloads/libpayload/arch/arm/exception_asm.S
@@ -43,72 +43,76 @@ exception_table:
b 8f
1:
- mov sp, $0
+ mov sp, #0
b exception_common
/* Undefined Instruction (CAREFUL: the PC offset is specific to thumb mode!) */
2:
- sub lr, lr, $2
- mov sp, $1
+ sub lr, lr, #2
+ mov sp, #1
b exception_common
/* Software Interrupt (no PC offset necessary) */
3:
- mov sp, $2
+ mov sp, #2
b exception_common
/* Prefetch Abort */
4:
- sub lr, lr, $4
- mov sp, $3
+ sub lr, lr, #4
+ mov sp, #3
b exception_common
/* Data Abort */
5:
- sub lr, lr, $8
- mov sp, $4
+ sub lr, lr, #8
+ mov sp, #4
b exception_common
/* (not used) */
6:
- mov sp, $5
+ mov sp, #5
b exception_common
/* Interrupt */
7:
- sub lr, lr, $4
- mov sp, $6
+ sub lr, lr, #4
+ mov sp, #6
b exception_common
/* Fast Interrupt */
8:
- sub lr, lr, $4
- mov sp, $7
+ sub lr, lr, #4
+ mov sp, #7
b exception_common
exception_common:
str sp, exception_idx
- ldr sp, exception_stack_end
- push { lr }
- stmfd sp, { sp, lr }^
- sub sp, sp, $8
- push { r0 - r12 }
+ ldr sp, exception_state_ptr
+ stmia sp!, { r0 - r12 } /* Save regs from bottom to top */
+ stmia sp, { sp, lr }^ /* Save banked SP/LR (no writeback) */
+ str lr, [sp, #(4 * 2)] /* Save PC to &regs[13] + 2 */
mrs r0, SPSR
- push { r0 }
- mov r0, sp
- ldr r1, exception_idx
+ str r0, [sp, #(4 * 3)] /* Save SPSR to &regs[13] + 3 */
+ ldr sp, exception_stack_end /* Point SP to the stack for C code */
+ ldr r0, exception_idx
blx exception_dispatch
- pop { r0 }
- msr SPSR_cxsf, r0
- pop { r0 - r12 }
- add sp, sp, $8
- ldmfd sp!, { pc }^
+ ldr sp, exception_state_ptr
+ ldr r0, [sp, #(4 * 16)] /* Load SPSR from &regs[0] + 16... */
+ msr SPSR_cxsf, r0 /* ...and get it out of the way */
+ ldmia sp!, { r0 - r12 } /* Restore regs from bottom to top */
+ ldmia sp, { sp, lr }^ /* Restore SP/LR to banked location */
+ add sp, sp, #8 /* Adjust SP (no writeback allowed) */
+ ldmia sp!, { pc }^ /* Do exception return (mode switch) */
.align 2
.global exception_stack_end
exception_stack_end:
.word 0
+ .global exception_state_ptr
+exception_state_ptr:
+ .word 0
exception_idx:
.word 0