libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication

It turns out that CB_TAG_ACPI_GNVS is handled in both x86 specific and
common coreboot table parsing code. The MRC cache case used only by
x86 is handled in the common code.

This patch restores sanity and moves processing to where it belongs.

BRANCH=none
BUG=none
TEST=verified that arm and x86 targets build.

Change-Id: Iaddaa3380725be6d08a51a96c68b70522531bafe
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0afae893d5027026cb666cd46e054aeae4e71f83
Original-Change-Id: I2c114a8469455002c51593cb8be80585925969a7
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/225457
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8752
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 9 insertions, 9 deletions

diff --git a/payloads/libpayload/arch/x86/coreboot.c b/payloads/libpayload/arch/x86/coreboot.c
index 1f37b80f14..3a9eb1a7be 100644
--- a/payloads/libpayload/arch/x86/coreboot.c
+++ b/payloads/libpayload/arch/x86/coreboot.c
@@ -42,27 +42,27 @@
 /* === Parsing code === */
 /* This is the generic parsing code. */
 
-static void cb_parse_acpi_gnvs(void *ptr, struct sysinfo_t *info)
-{
-	struct cb_cbmem_tab *const cbmem = (struct cb_cbmem_tab *)ptr;
-	info->acpi_gnvs = phys_to_virt(cbmem->cbmem_tab);
-}
-
 static void cb_parse_x86_rom_var_mtrr(void *ptr, struct sysinfo_t *info)
 {
 	struct cb_x86_rom_mtrr *rom_mtrr = ptr;
 	info->x86_rom_var_mtrr_index = rom_mtrr->index;
 }
 
+static void cb_parse_mrc_cache(void *ptr, struct sysinfo_t *info)
+{
+	struct cb_cbmem_tab *const cbmem = (struct cb_cbmem_tab *)ptr;
+	info->mrc_cache = phys_to_virt(cbmem->cbmem_tab);
+}
+
 int cb_parse_arch_specific(struct cb_record *rec, struct sysinfo_t *info)
 {
 	switch(rec->tag) {
-	case CB_TAG_ACPI_GNVS:
-		cb_parse_acpi_gnvs(rec, info);
-		break;
 	case CB_TAG_X86_ROM_MTRR:
 		cb_parse_x86_rom_var_mtrr(rec, info);
 		break;
+	case CB_TAG_MRC_CACHE:
+		cb_parse_mrc_cache(rec, info);
+		break;
 	default:
 		return 0;
 	}