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authorT Michael Turney <mturney@codeaurora.org>2018-04-26 10:14:20 -0700
committerJulius Werner <jwerner@chromium.org>2018-05-01 23:34:03 +0000
commit1e3e02a1d2cbcaf0f3f9a99ef58654ff6edcf1e4 (patch)
tree1f09f2e5abf0f12caf43292cc64c01954ac44567 /payloads/libpayload/arch
parent7978b8b725c421679d0f87128f1e6277c4edda4b (diff)
downloadcoreboot-1e3e02a1d2cbcaf0f3f9a99ef58654ff6edcf1e4.tar.xz
libpayload: Add raw_read_ functions
Add: raw_read_cntfrq_el0() and raw_read_cntpct_el0() Required to support Arch64 Timer Change-Id: I86aa97039304b9e9336d0146febfe1811c9e075a Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'payloads/libpayload/arch')
-rw-r--r--payloads/libpayload/arch/arm64/lib/sysctrl.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/payloads/libpayload/arch/arm64/lib/sysctrl.c b/payloads/libpayload/arch/arm64/lib/sysctrl.c
index c9d80fffd5..6d2421b08b 100644
--- a/payloads/libpayload/arch/arm64/lib/sysctrl.c
+++ b/payloads/libpayload/arch/arm64/lib/sysctrl.c
@@ -1043,3 +1043,19 @@ void raw_write_vbar(uint64_t vbar, uint32_t el)
{
SWITCH_CASE_WRITE(raw_write_vbar, vbar, el);
}
+
+uint32_t raw_read_cntfrq_el0(void)
+{
+ uint64_t cntfrq_el0;
+
+ __asm__ __volatile__("mrs %0, CNTFRQ_EL0\n\t" : "=r" (cntfrq_el0) : : "memory");
+ return cntfrq_el0;
+}
+
+uint64_t raw_read_cntpct_el0(void)
+{
+ uint64_t cntpct_el0;
+
+ __asm__ __volatile__("mrs %0, CNTPCT_EL0\n\t" : "=r" (cntpct_el0) : : "memory");
+ return cntpct_el0;
+}