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authorAaron Durbin <adurbin@chromium.org>2016-02-10 11:01:49 -0600
committerMartin Roth <martinroth@google.com>2016-02-19 19:50:25 +0100
commit152e5a03a130cea3009685cbf7eb0ea354d9fd1c (patch)
treed84669468988416d9d37f15c54d5db3343363cd5 /payloads/libpayload/arch
parente0969aec2573872b9f528e33edd2cf3fb84c5948 (diff)
downloadcoreboot-152e5a03a130cea3009685cbf7eb0ea354d9fd1c.tar.xz
libpayload: honor TSC information under CONFIG_LP_TIMER_RDTSC
When CONFIG_LP_TIMER_RDTSC is enabled honor the TSC information exported in the coreboot tables as the cpu_khz frequency. That allows get_cpu_speed() not to be called which currently relies on the 8254 PIT. As certain x86 platforms allow that device to be optional or turned off for power saving reasons, allow a path where get_cpu_speed() is no longer called. Additionally, this approach also allows the libpayload to not duplicate logic that already exists in coreboot. BUG=chrome-os-partner:50214 BRANCH=glados TEST=Confirmed in payload TSC frequency is honored instead of using get_cpu_speed(). Change-Id: Ib8993afdfb49065d43de705d6dbbdb9174b6f2c4 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13671 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'payloads/libpayload/arch')
-rw-r--r--payloads/libpayload/arch/x86/sysinfo.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/payloads/libpayload/arch/x86/sysinfo.c b/payloads/libpayload/arch/x86/sysinfo.c
index c3336b81e4..ddd6550e08 100644
--- a/payloads/libpayload/arch/x86/sysinfo.c
+++ b/payloads/libpayload/arch/x86/sysinfo.c
@@ -32,12 +32,14 @@
#include <coreboot_tables.h>
#include <multiboot_tables.h>
+#define CPU_KHZ_DEFAULT 200
+
/**
* This is a global structure that is used through the library - we set it
* up initially with some dummy values - hopefully they will be overridden.
*/
struct sysinfo_t lib_sysinfo = {
- .cpu_khz = 200,
+ .cpu_khz = CPU_KHZ_DEFAULT,
#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE)
.ser_ioport = CONFIG_LP_SERIAL_IOBASE,
#else
@@ -49,9 +51,6 @@ int lib_get_sysinfo(void)
{
int ret;
- /* Get the CPU speed (for delays). */
- lib_sysinfo.cpu_khz = get_cpu_speed();
-
#if IS_ENABLED(CONFIG_LP_MULTIBOOT)
/* Get the information from the multiboot tables,
* if they exist */
@@ -63,6 +62,10 @@ int lib_get_sysinfo(void)
ret = get_coreboot_info(&lib_sysinfo);
+ /* Get the CPU speed (for delays) if not set from the default value. */
+ if (lib_sysinfo.cpu_khz == CPU_KHZ_DEFAULT)
+ lib_sysinfo.cpu_khz = get_cpu_speed();
+
if (!lib_sysinfo.n_memranges) {
/* If we can't get a good memory range, use the default. */
lib_sysinfo.n_memranges = 2;