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author | Marc Jones <marc.jones@se-eng.com> | 2014-12-23 15:22:30 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-30 19:08:37 +0100 |
commit | 019bacb41a01f9d26ccd6040641402131af0f602 (patch) | |
tree | 8f0c4400e004e0bf86e651ab9fb8e4434bd5d975 /payloads/libpayload/configs/defconfig-arm | |
parent | 86127c7bfe14e8b3f9e45de66d503102eafa654f (diff) | |
download | coreboot-019bacb41a01f9d26ccd6040641402131af0f602.tar.xz |
libpayload: Remove PC Keyboard from ARM build
The keyboard.c uses IO cycles to access the legacy PC keyboard device.
ARM can't do IO cycles, so remove the option for ARM configs.
Change-Id: Ifc6c2368563f27867f4babad5afdde0e78f4cf78
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/7922
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'payloads/libpayload/configs/defconfig-arm')
-rw-r--r-- | payloads/libpayload/configs/defconfig-arm | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/payloads/libpayload/configs/defconfig-arm b/payloads/libpayload/configs/defconfig-arm index 12ad423e37..fe47d0c60d 100644 --- a/payloads/libpayload/configs/defconfig-arm +++ b/payloads/libpayload/configs/defconfig-arm @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # libpayload version: 0.2.0 -# Wed Nov 12 14:57:03 2014 +# Tue Dec 23 15:19:30 2014 # # @@ -42,9 +42,7 @@ CONFIG_LP_SERIAL_CONSOLE=y # CONFIG_LP_SERIAL_ACS_FALLBACK is not set CONFIG_LP_VIDEO_CONSOLE=y # CONFIG_LP_COREBOOT_VIDEO_CONSOLE is not set -CONFIG_LP_PC_KEYBOARD=y -CONFIG_LP_PC_KEYBOARD_LAYOUT_US=y -# CONFIG_LP_PC_KEYBOARD_LAYOUT_DE is not set +# CONFIG_LP_PC_KEYBOARD is not set # # Drivers @@ -70,5 +68,3 @@ CONFIG_LP_USB_GEN_HUB=y CONFIG_LP_LITTLE_ENDIAN=y # CONFIG_LP_IO_ADDRESS_SPACE is not set CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y -CONFIG_LP_COREBOOT_INFO_RANGE_BASE=0x10 -CONFIG_LP_COREBOOT_INFO_RANGE_SIZE=0x4000000 |