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authorChunfeng Yun <chunfeng.yun@mediatek.com>2015-05-07 15:28:19 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-06-03 10:59:41 +0200
commit08e30134900c1c8f169668e8b5b2b90254996c9a (patch)
treef755ec7f9891b3892ec89eb19913d282aa663e67 /payloads/libpayload/drivers/pci.c
parenta4cf83df7a3ef3401e12ca3732cbe07294684d02 (diff)
downloadcoreboot-08e30134900c1c8f169668e8b5b2b90254996c9a.tar.xz
libpayload: usb: Max packet size of SuperSpeed control EPs should be 512.
BRANCH=none BUG=none TEST=none Change-Id: I563ef65db900d7675aeb5b9123dfb5a8980bf964 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9764115d7bcce1d6423464bd81b58211ac728409 Original-Change-Id: Ibac8d3b9e28b4a563079f288901abcfbff6913ee Original-Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/269863 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Queue: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Reviewed-on: http://review.coreboot.org/10388 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads/libpayload/drivers/pci.c')
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