summaryrefslogtreecommitdiff
path: root/payloads/libpayload/drivers/serial
diff options
context:
space:
mode:
authorGabe Black <gabeblack@google.com>2014-04-10 01:07:28 -0700
committerPatrick Georgi <pgeorgi@google.com>2014-11-09 13:39:11 +0100
commita6aecc41eff1fd26e6399f93f143951b4d16417b (patch)
tree6aa975b11a9b4ca0b2bd6146ed467ae015d84412 /payloads/libpayload/drivers/serial
parentd1069e0a402d2875befdf5caed806f4afec232f7 (diff)
downloadcoreboot-a6aecc41eff1fd26e6399f93f143951b4d16417b.tar.xz
libpayload: serial: Move the depthcharge serial drivers into libpayload.
These drivers need to be ready right away and never really fit into the depthcharge driver model anyway. CQ-DEPEND=CL:194063 BUG=None TEST=Built and booted on nyan and peach_pit. Built for nyan_big, nyan_blaze, and daisy. BRANCH=None Original-Change-Id: I9570dee53c57d42ef4cd956f66a878ce39a2dc20 Original-Signed-off-by: Gabe Black <gabeblack@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/194057 Original-Reviewed-by: Gabe Black <gabeblack@chromium.org> Original-Commit-Queue: Gabe Black <gabeblack@chromium.org> Original-Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 26e18f680c93fc990a3d1057c164f19859634a9f) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ia2233e2bd821d8de8d2d57a9423aeb74be7efd93 Reviewed-on: http://review.coreboot.org/7224 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'payloads/libpayload/drivers/serial')
-rw-r--r--payloads/libpayload/drivers/serial/8250.c245
-rw-r--r--payloads/libpayload/drivers/serial/s5p.c106
-rw-r--r--payloads/libpayload/drivers/serial/tegra.c111
3 files changed, 462 insertions, 0 deletions
diff --git a/payloads/libpayload/drivers/serial/8250.c b/payloads/libpayload/drivers/serial/8250.c
new file mode 100644
index 0000000000..a4c1b1a2ab
--- /dev/null
+++ b/payloads/libpayload/drivers/serial/8250.c
@@ -0,0 +1,245 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008 Ulf Jordan <jordan@chalmers.se>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <libpayload-config.h>
+#include <libpayload.h>
+
+#define IOBASE lib_sysinfo.serial->baseaddr
+#define MEMBASE (phys_to_virt(IOBASE))
+
+static int serial_hardware_is_present = 0;
+static int serial_is_mem_mapped = 0;
+
+static uint8_t serial_read_reg(int offset)
+{
+#ifdef CONFIG_LP_IO_ADDRESS_SPACE
+ if (!serial_is_mem_mapped)
+ return inb(IOBASE + offset);
+ else
+#endif
+ return readb(MEMBASE + offset);
+}
+
+static void serial_write_reg(uint8_t val, int offset)
+{
+#ifdef CONFIG_LP_IO_ADDRESS_SPACE
+ if (!serial_is_mem_mapped)
+ outb(val, IOBASE + offset);
+ else
+#endif
+ writeb(val, MEMBASE + offset);
+}
+
+#ifdef CONFIG_LP_SERIAL_SET_SPEED
+static void serial_hardware_init(int speed, int word_bits,
+ int parity, int stop_bits)
+{
+ unsigned char reg;
+
+ /* Disable interrupts. */
+ serial_write_reg(0, 0x01);
+
+ /* Assert RTS and DTR. */
+ serial_write_reg(3, 0x04);
+
+ /* Set the divisor latch. */
+ reg = serial_read_reg(0x03);
+ serial_write_reg(reg | 0x80, 0x03);
+
+ /* Write the divisor. */
+ uint16_t divisor = 115200 / speed;
+ serial_write_reg(divisor & 0xFF, 0x00);
+ serial_write_reg(divisor >> 8, 0x01);
+
+ /* Restore the previous value of the divisor.
+ * And set 8 bits per character */
+ serial_write_reg((reg & ~0x80) | 3, 0x03);
+}
+#endif
+
+static struct console_input_driver consin = {
+ .havekey = &serial_havechar,
+ .getchar = &serial_getchar
+};
+
+static struct console_output_driver consout = {
+ .putchar = &serial_putchar
+};
+
+void serial_init(void)
+{
+ if (!lib_sysinfo.serial)
+ return;
+
+ serial_is_mem_mapped =
+ (lib_sysinfo.serial->type == CB_SERIAL_TYPE_MEMORY_MAPPED);
+
+ if (!serial_is_mem_mapped) {
+#ifdef CONFIG_LP_IO_ADDRESS_SPACE
+ if ((inb(IOBASE + 0x05) == 0xFF) &&
+ (inb(IOBASE + 0x06) == 0xFF)) {
+ printf("IO space mapped serial not present.");
+ return;
+ }
+#else
+ printf("IO space mapped serial not supported.");
+ return;
+#endif
+ }
+
+#ifdef CONFIG_LP_SERIAL_SET_SPEED
+ serial_hardware_init(CONFIG_LP_SERIAL_BAUD_RATE, 8, 0, 1);
+#endif
+}
+
+void serial_console_init(void)
+{
+ if (!lib_sysinfo.serial)
+ return;
+
+ serial_init();
+
+ console_add_input_driver(&consin);
+ console_add_output_driver(&consout);
+ serial_hardware_is_present = 1;
+}
+
+void serial_putchar(unsigned int c)
+{
+ if (!serial_hardware_is_present)
+ return;
+ while ((serial_read_reg(0x05) & 0x20) == 0) ;
+ serial_write_reg(c, 0x00);
+}
+
+int serial_havechar(void)
+{
+ if (!serial_hardware_is_present)
+ return 0;
+ return serial_read_reg(0x05) & 0x01;
+}
+
+int serial_getchar(void)
+{
+ if (!serial_hardware_is_present)
+ return -1;
+ while (!serial_havechar()) ;
+ return serial_read_reg(0x00);
+}
+
+/* These are thinly veiled vt100 functions used by curses */
+
+#define VT100_CLEAR "\e[H\e[J"
+/* These defines will fail if you use bold and reverse at the same time.
+ * Switching off one of them will switch off both. tinycurses knows about
+ * this and does the right thing.
+ */
+#define VT100_SBOLD "\e[1m"
+#define VT100_EBOLD "\e[m"
+#define VT100_SREVERSE "\e[7m"
+#define VT100_EREVERSE "\e[m"
+#define VT100_CURSOR_ADDR "\e[%d;%dH"
+#define VT100_CURSOR_ON "\e[?25l"
+#define VT100_CURSOR_OFF "\e[?25h"
+/* The following smacs/rmacs are actually for xterm; a real vt100 has
+ enacs=\E(B\E)0, smacs=^N, rmacs=^O. */
+#define VT100_SMACS "\e(0"
+#define VT100_RMACS "\e(B"
+/* A vt100 doesn't do color, setaf/setab below are from xterm-color. */
+#define VT100_SET_COLOR "\e[3%d;4%dm"
+
+static void serial_putcmd(const char *str)
+{
+ while (*str)
+ serial_putchar(*(str++));
+}
+
+void serial_clear(void)
+{
+ serial_putcmd(VT100_CLEAR);
+}
+
+void serial_start_bold(void)
+{
+ serial_putcmd(VT100_SBOLD);
+}
+
+void serial_end_bold(void)
+{
+ serial_putcmd(VT100_EBOLD);
+}
+
+void serial_start_reverse(void)
+{
+ serial_putcmd(VT100_SREVERSE);
+}
+
+void serial_end_reverse(void)
+{
+ serial_putcmd(VT100_EREVERSE);
+}
+
+void serial_start_altcharset(void)
+{
+ serial_putcmd(VT100_SMACS);
+}
+
+void serial_end_altcharset(void)
+{
+ serial_putcmd(VT100_RMACS);
+}
+
+/**
+ * Set the foreground and background colors on the serial console.
+ *
+ * @param fg Foreground color number.
+ * @param bg Background color number.
+ */
+void serial_set_color(short fg, short bg)
+{
+ char buffer[32];
+ snprintf(buffer, sizeof(buffer), VT100_SET_COLOR, fg, bg);
+ serial_putcmd(buffer);
+}
+
+void serial_set_cursor(int y, int x)
+{
+ char buffer[32];
+ snprintf(buffer, sizeof(buffer), VT100_CURSOR_ADDR, y + 1, x + 1);
+ serial_putcmd(buffer);
+}
+
+void serial_cursor_enable(int state)
+{
+ if (state)
+ serial_putcmd(VT100_CURSOR_ON);
+ else
+ serial_putcmd(VT100_CURSOR_OFF);
+}
diff --git a/payloads/libpayload/drivers/serial/s5p.c b/payloads/libpayload/drivers/serial/s5p.c
new file mode 100644
index 0000000000..1d23352ec4
--- /dev/null
+++ b/payloads/libpayload/drivers/serial/s5p.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <libpayload.h>
+#include <stdint.h>
+
+struct s5p_uart
+{
+ uint32_t ulcon; // line control
+ uint32_t ucon; // control
+ uint32_t ufcon; // FIFO control
+ uint32_t umcon; // modem control
+ uint32_t utrstat; // Tx/Rx status
+ uint32_t uerstat; // Rx error status
+ uint32_t ufstat; // FIFO status
+ uint32_t umstat; // modem status
+ uint32_t utxh; // transmit buffer
+ uint32_t urxh; // receive buffer
+ uint32_t ubrdiv; // baud rate divisor
+ uint32_t ufracval; // divisor fractional value
+ uint32_t uintp; // interrupt pending
+ uint32_t uints; // interrupt source
+ uint32_t uintm; // interrupt mask
+};
+
+static struct s5p_uart *uart_regs;
+
+void serial_putchar(unsigned int c)
+{
+ const uint32_t TxFifoFullBit = (0x1 << 24);
+
+ while (readl(&uart_regs->ufstat) & TxFifoFullBit)
+ {;}
+
+ writeb(c, &uart_regs->utxh);
+ if (c == '\n')
+ serial_putchar('\r');
+}
+
+int serial_havechar(void)
+{
+ const uint32_t DataReadyMask = (0xf << 0) | (0x1 << 8);
+
+ return (readl(&uart_regs->ufstat) & DataReadyMask) != 0;
+}
+
+int serial_getchar(void)
+{
+ while (!serial_havechar())
+ {;}
+
+ return readb(&uart_regs->urxh);
+}
+
+static struct console_output_driver s5p_serial_output =
+{
+ .putchar = &serial_putchar
+};
+
+static struct console_input_driver s5p_serial_input =
+{
+ .havekey = &serial_havechar,
+ .getchar = &serial_getchar
+};
+
+void serial_init(void)
+{
+ if (!lib_sysinfo.serial || !lib_sysinfo.serial->baseaddr)
+ return;
+
+ uart_regs = (struct s5p_uart *)lib_sysinfo.serial->baseaddr;
+}
+
+void serial_console_init(void)
+{
+ serial_init();
+
+ if (uart_regs) {
+ console_add_output_driver(&s5p_serial_output);
+ console_add_input_driver(&s5p_serial_input);
+ }
+}
diff --git a/payloads/libpayload/drivers/serial/tegra.c b/payloads/libpayload/drivers/serial/tegra.c
new file mode 100644
index 0000000000..bcf7b1925d
--- /dev/null
+++ b/payloads/libpayload/drivers/serial/tegra.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <libpayload.h>
+#include <stdint.h>
+
+struct tegra_uart {
+ union {
+ uint32_t thr; // Transmit holding register.
+ uint32_t rbr; // Receive buffer register.
+ uint32_t dll; // Divisor latch lsb.
+ };
+ union {
+ uint32_t ier; // Interrupt enable register.
+ uint32_t dlm; // Divisor latch msb.
+ };
+ union {
+ uint32_t iir; // Interrupt identification register.
+ uint32_t fcr; // FIFO control register.
+ };
+ uint32_t lcr; // Line control register.
+ uint32_t mcr; // Modem control register.
+ uint32_t lsr; // Line status register.
+ uint32_t msr; // Modem status register.
+} __attribute__ ((packed));
+
+enum {
+ TEGRA_UART_LSR_DR = 0x1 << 0, // Data ready.
+ TEGRA_UART_LSR_OE = 0x1 << 1, // Overrun.
+ TEGRA_UART_LSR_PE = 0x1 << 2, // Parity error.
+ TEGRA_UART_LSR_FE = 0x1 << 3, // Framing error.
+ TEGRA_UART_LSR_BI = 0x1 << 4, // Break.
+ TEGRA_UART_LSR_THRE = 0x1 << 5, // Xmit holding register empty.
+ TEGRA_UART_LSR_TEMT = 0x1 << 6, // Xmitter empty.
+ TEGRA_UART_LSR_ERR = 0x1 << 7 // Error.
+};
+
+static struct tegra_uart *uart_regs;
+
+void serial_putchar(unsigned int c)
+{
+ while (!(readb(&uart_regs->lsr) & TEGRA_UART_LSR_THRE));
+ writeb(c, &uart_regs->thr);
+}
+
+int serial_havechar(void)
+{
+ uint8_t lsr = readb(&uart_regs->lsr);
+ return (lsr & TEGRA_UART_LSR_DR) == TEGRA_UART_LSR_DR;
+}
+
+int serial_getchar(void)
+{
+ while (!serial_havechar())
+ {;}
+
+ return readb(&uart_regs->rbr);
+}
+
+static struct console_output_driver tegra_serial_output =
+{
+ .putchar = &serial_putchar
+};
+
+static struct console_input_driver tegra_serial_input =
+{
+ .havekey = &serial_havechar,
+ .getchar = &serial_getchar
+};
+
+void serial_init(void)
+{
+ if (!lib_sysinfo.serial || !lib_sysinfo.serial->baseaddr)
+ return;
+
+ uart_regs = (struct tegra_uart *)lib_sysinfo.serial->baseaddr;
+}
+
+void serial_console_init(void)
+{
+ serial_init();
+
+ if (uart_regs) {
+ console_add_output_driver(&tegra_serial_output);
+ console_add_input_driver(&tegra_serial_input);
+ }
+}