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authorAntonello Dettori <dev@dettori.io>2016-07-27 12:41:04 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-08-02 20:14:36 +0200
commitaded214e74bcb63990d69551bec7ab03c6785b08 (patch)
tree90c308f9b3c61bc05df06e78e7ad951c415602e0 /payloads/libpayload/drivers/timer
parent935a4303d7e4a4499fe976c64866a6c32475db3b (diff)
downloadcoreboot-aded214e74bcb63990d69551bec7ab03c6785b08.tar.xz
libpayload: split "Drivers" config section in Kconfig
Move the configuration of the timer, storage and USB drivers from the main Kconfig to three separate ones stored in the respective directories. This reduces the LOC of Kconfig and makes it more manageable. Change-Id: I0786dbc1d5d8317c8ccb600f5de9ef4a8243d035 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/15914 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads/libpayload/drivers/timer')
-rw-r--r--payloads/libpayload/drivers/timer/Kconfig129
1 files changed, 129 insertions, 0 deletions
diff --git a/payloads/libpayload/drivers/timer/Kconfig b/payloads/libpayload/drivers/timer/Kconfig
new file mode 100644
index 0000000000..8f047fa63c
--- /dev/null
+++ b/payloads/libpayload/drivers/timer/Kconfig
@@ -0,0 +1,129 @@
+##
+## This file is part of the coreboot project.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+
+config TIMER_RDTSC
+ bool
+ default y
+ depends on ARCH_X86
+
+choice
+ prompt "Timer driver"
+ default TIMER_NONE
+ depends on !ARCH_X86
+
+config TIMER_NONE
+ bool "None"
+ help
+ The timer driver is provided by the payload itself.
+
+config TIMER_MCT
+ bool "Exynos MCT"
+
+config TIMER_TEGRA_1US
+ bool "Tegra 1us"
+
+config TIMER_IPQ806X
+ bool "Timer for ipq806x platforms"
+
+config TIMER_ARMADA38X
+ bool "Timer for armada38x platforms"
+ help
+ This is the timer driver for marvell armada38x
+ platforms.
+
+config TIMER_IPQ40XX
+ bool "Timer for ipq40xx platforms"
+ help
+ This is the timer driver for QCA IPQ40xx based
+ platforms.
+
+config TIMER_RK
+ bool "Timer for Rockchip"
+
+config TIMER_BG4CD
+ bool "Marvell BG4CD"
+
+config TIMER_CYGNUS
+ bool "Timer for Cygnus"
+
+config TIMER_IMG_PISTACHIO
+ bool "Timer for IMG Pistachio"
+
+config TIMER_MTK
+ bool "Timer for MediaTek MT8173"
+
+endchoice
+
+config TIMER_MCT_HZ
+ int "Exynos MCT frequency"
+ depends on TIMER_MCT
+ default 24000000
+
+config TIMER_MCT_ADDRESS
+ hex "Exynos MCT base address"
+ depends on TIMER_MCT
+ default 0x101c0000
+
+config TIMER_RK_ADDRESS
+ hex "Rockchip timer base address"
+ depends on TIMER_RK
+ default 0xff810020
+
+config TIMER_TEGRA_1US_ADDRESS
+ hex "Tegra u1s timer base address"
+ depends on TIMER_TEGRA_1US
+ default 0x60005010
+
+config IPQ806X_TIMER_FREQ
+ int "Hardware timer frequency"
+ default 32000
+ depends on TIMER_IPQ806X
+ help
+ IPQ hardware presently provides a single timer running at 32KHz, a
+ finer granulariry timer is available but is not yet enabled.
+
+config IPQ806X_TIMER_REG
+ hex "Timer register address"
+ default 0x0200A008
+ depends on TIMER_IPQ806X
+ help
+ Address of the register to read a free running timer value.
+
+config ARMADA38X_TIMER_FREQ
+ int "Hardware timer frequency"
+ depends on TIMER_ARMADA38X
+ default 25000000
+
+config ARMADA38X_TIMER_REG
+ hex "Timer register address"
+ default 0xF1020314
+ depends on TIMER_ARMADA38X
+
+config IPROC_PERIPH_GLB_TIM_REG_BASE
+ hex "Cygnus timer base address"
+ depends on TIMER_CYGNUS
+ default 0x19020200
+
+config TIMER_MTK_HZ
+ int "MediaTek GPT frequency"
+ depends on TIMER_MTK
+ default 13000000
+ help
+ Clock frequency of MediaTek General Purpose Timer.
+
+config TIMER_MTK_ADDRESS
+ hex "MTK GPT register address"
+ depends on TIMER_MTK
+ default 0x10008048
+ help
+ Address of GPT4's counter register to read the FREERUN-mode timer value.
+