diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2013-05-02 16:16:41 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-11-25 23:31:52 +0100 |
| commit | 8992e53c23cb088efbdafbf3e2ba77e7d8778d71 (patch) | |
| tree | 1eba559ee986c4994b63e75d9647fc733ae833f6 /payloads/libpayload/drivers/usb/xhci.c | |
| parent | 441a4baf87ada2608a109a203a5d8040f6dc2b0d (diff) | |
| download | coreboot-8992e53c23cb088efbdafbf3e2ba77e7d8778d71.tar.xz | |
libpayload: Add USB support for non-PCI controllers
Restructure USB stack to not depend on PCI, and
make PCI stub available on x86, but provide fixed
BARs for ARM (Exynos 5)
Change-Id: Iee7c8b134c22b661a9a515e24943470c9dbadd1f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/49970
Reviewed-on: http://review.coreboot.org/4175
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'payloads/libpayload/drivers/usb/xhci.c')
| -rw-r--r-- | payloads/libpayload/drivers/usb/xhci.c | 36 |
1 files changed, 24 insertions, 12 deletions
diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c index 51f9422ceb..aa2fe579a2 100644 --- a/payloads/libpayload/drivers/usb/xhci.c +++ b/payloads/libpayload/drivers/usb/xhci.c @@ -143,7 +143,7 @@ xhci_wait_ready(xhci_t *const xhci) } hci_t * -xhci_init (const pcidev_t addr) +xhci_init (const void *bar) { int i; @@ -192,14 +192,7 @@ xhci_init (const pcidev_t addr) goto _free_xhci; } - /* Now, gather information and check for compatibility */ - - controller->bus_address = addr; - controller->reg_base = pci_read_config32(addr, REG_BAR0) & ~0xf; - if (pci_read_config32(addr, REG_BAR1) > 0) { - xhci_debug("We don't do 64bit addressing\n"); - goto _free_xhci; - } + controller->reg_base = (u32)(unsigned long)bar; xhci->capreg = phys_to_virt(controller->reg_base); xhci->opreg = ((void *)xhci->capreg) + xhci->capreg->caplength; @@ -270,7 +263,6 @@ xhci_init (const pcidev_t addr) } /* Now start working on the hardware */ - if (xhci_wait_ready(xhci)) goto _free_xhci; @@ -279,8 +271,6 @@ xhci_init (const pcidev_t addr) xhci_reset(controller); xhci_reinit(controller); - xhci_switch_ppt_ports(addr); - xhci->roothub->controller = controller; xhci->roothub->init = xhci_rh_init; xhci->roothub->init(xhci->roothub); @@ -308,6 +298,28 @@ _free_controller: return NULL; } +#ifdef CONFIG_USB_PCI +hci_t * +xhci_pci_init (pcidev_t addr) +{ + u32 reg_addr; + hci_t controller; + + reg_addr = (u32)phys_to_virt(pci_read_config32 (addr, 0x10) & ~0xf); + //controller->reg_base = pci_read_config32 (addr, 0x14) & ~0xf; + if (pci_read_config32 (addr, 0x14) > 0) { + fatal("We don't do 64bit addressing.\n"); + } + + controller = xhci_init((void *)(unsigned long)reg_addr); + controller->bus_address = addr; + + xhci_switch_ppt_ports(addr); + + return controller; +} +#endif + static void xhci_reset(hci_t *const controller) { |