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| author | Aaron Durbin <adurbin@chromium.org> | 2012-10-31 22:57:16 -0500 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-14 01:45:50 +0100 |
| commit | 6d04f0f89e4bf8ea4bea35dd850dad7469ca5ab3 (patch) | |
| tree | f2ef87afe46d78ad5a8eff161e6f29016ddf5918 /payloads/libpayload/drivers/usb | |
| parent | 76c3700f02f79b49fec30d6ef18d336f122cbf50 (diff) | |
| download | coreboot-6d04f0f89e4bf8ea4bea35dd850dad7469ca5ab3.tar.xz | |
haswell: always use MMIO PCI config accesses
Add a bootblock.c file for the northbridge and setup the
PCIEXBAR as the first thing using IO PCI config acceses.
After that all PCI config accesses can use MMIO.
Change-Id: I51d229c626c45705dda1757c2f14265cbc0e6183
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2617
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'payloads/libpayload/drivers/usb')
0 files changed, 0 insertions, 0 deletions