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author | Shawn Nematbakhsh <shawnn@chromium.org> | 2014-03-10 14:46:06 -0700 |
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committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-10-02 17:29:54 +0200 |
commit | e1dad0c0b9f3aaf7a5f09a48f44fa8d2d9ef1b72 (patch) | |
tree | edb8db4a7fef2688f57f1047c7843588dfdafc23 /payloads/libpayload/drivers | |
parent | a16029a93d06dc73f7ee2796db7c90b2211ee776 (diff) | |
download | coreboot-e1dad0c0b9f3aaf7a5f09a48f44fa8d2d9ef1b72.tar.xz |
libpayload: usb: xhci: Treat port reset as a port status change
If a port is connected before and after an xhci controller reset, the
PORTSC CSC bit may not be asserted. Add an additional check in
xhci_rh_port_status_changed for the PRC bit so we can correctly handle
ports in such a state.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I2d623aae647ab13711badd7211ab467afdc69548
Reviewed-on: https://chromium-review.googlesource.com/189394
Reviewed-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit ee7c3ea182b35bb6ce3c62f301c4515714f6e654)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/7002
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'payloads/libpayload/drivers')
-rw-r--r-- | payloads/libpayload/drivers/usb/xhci_rh.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/payloads/libpayload/drivers/usb/xhci_rh.c b/payloads/libpayload/drivers/usb/xhci_rh.c index 26bb4f9c02..fa118fe460 100644 --- a/payloads/libpayload/drivers/usb/xhci_rh.c +++ b/payloads/libpayload/drivers/usb/xhci_rh.c @@ -51,7 +51,7 @@ xhci_rh_port_status_changed(usbdev_t *const dev, const int port) xhci_t *const xhci = XHCI_INST(dev->controller); volatile u32 *const portsc = &xhci->opreg->prs[port - 1].portsc; - const int changed = !!(*portsc & PORTSC_CSC); + const int changed = !!(*portsc & (PORTSC_CSC | PORTSC_PRC)); /* always clear all the status change bits */ *portsc = (*portsc & PORTSC_RW_MASK) | 0x00ef0000; return changed; |