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authorFelix Singer <felix.singer@secunet.com>2020-10-14 18:44:49 +0200
committerNico Huber <nico.h@gmx.de>2020-10-20 20:35:47 +0000
commitb4b73d49958184c833844a3a6f6a3777dd469ceb (patch)
tree78124ea9a0cac265d4ec0d6107ae0dc78a544b5f /payloads/libpayload/include
parent9e5bc74cc7c2a6ced08163418299cc753b8357f0 (diff)
downloadcoreboot-b4b73d49958184c833844a3a6f6a3777dd469ceb.tar.xz
libpayload/storage/ahci: Use pacc pointer to read device class
The PCI bus gets already scanned while gathering system information. Therefore, use the pacc pointer from sysinfo_t to read the device class of PCI devices instead of rescanning the bus. Change-Id: I4c79e71777e718f5065107ebf780ca9fdb4f1b0c Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46416 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'payloads/libpayload/include')
-rw-r--r--payloads/libpayload/include/pci/pci.h1
-rw-r--r--payloads/libpayload/include/storage/ahci.h2
2 files changed, 2 insertions, 1 deletions
diff --git a/payloads/libpayload/include/pci/pci.h b/payloads/libpayload/include/pci/pci.h
index 7ec9491d95..5e21060130 100644
--- a/payloads/libpayload/include/pci/pci.h
+++ b/payloads/libpayload/include/pci/pci.h
@@ -66,6 +66,7 @@
#define PCI_ROM_ADDRESS1 0x38 // on bridges
#define PCI_ROM_ADDRESS_MASK ~0x7ff
+#define PCI_CLASS_STORAGE_AHCI 0x0106
#define PCI_CLASS_MEMORY_OTHER 0x0580
#define PCI_VENDOR_ID_INTEL 0x8086
diff --git a/payloads/libpayload/include/storage/ahci.h b/payloads/libpayload/include/storage/ahci.h
index 0aa032297a..28436249f8 100644
--- a/payloads/libpayload/include/storage/ahci.h
+++ b/payloads/libpayload/include/storage/ahci.h
@@ -29,6 +29,6 @@
#ifndef _STORAGE_AHCI_H
#define _STORAGE_AHCI_H
-void ahci_initialize(void);
+void ahci_initialize(pcidev_t dev);
#endif