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| author | Nico Huber <nico.huber@secunet.com> | 2013-06-24 12:39:53 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-06-25 18:50:55 +0200 |
| commit | 99b024db885833ebe46be0917f9c2283e3778fac (patch) | |
| tree | 2171d536df9adb06baf752735283817334e49805 /payloads/libpayload/libc/malloc.c | |
| parent | c000352d5cd3419586107fc93f978fdd94492d5f (diff) | |
| download | coreboot-99b024db885833ebe46be0917f9c2283e3778fac.tar.xz | |
bd82x6x: Fix early USB BAR programming (finally?)
The xHCI controller's MMIO space has a length of 64KiB not 4KiB.
Therefore, setting the xHCI BAR to 0xe8001000 worked the same like
setting it to 0xe8000000, as bit12 is reserved and ignored. This again
interfered with the MMIO space of the first EHCI controller and broke
S3 resume on Ivy Bridge.
AFAIK, the MRC ignores the setting of the xHCI BAR, anyway. So just drop
these lines.
Change-Id: I8af9c2ba34133f15636a9056fc8880b3b6ab95e0
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3521
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'payloads/libpayload/libc/malloc.c')
0 files changed, 0 insertions, 0 deletions