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authorFurquan Shaikh <furquan@google.com>2015-06-10 20:38:48 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-06-23 08:19:57 +0200
commit3cec871eaa772073ab016194eb24bdc6fb3c675c (patch)
tree996bc8683daea15cb0e0db9b55c7ded4488202d2 /payloads/libpayload
parent78c6e3ec42e9519fc329a65045bfd8b169080b59 (diff)
downloadcoreboot-3cec871eaa772073ab016194eb24bdc6fb3c675c.tar.xz
libpayload: Parse MTC and fill mtc_start and mtc_size
Parse coreboot table and fill in mtc_start and mtc_size values in sysinfo structure. BUG=chrome-os-partner:41125 BRANCH=None TEST=Compiles successfully and boots to kernel prompt Change-Id: If210ea0a105f6879686e6e930cb29e66bc5e6cd0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b70d0d35c85fa1a2317b0239276d5d9e7a550472 Original-Change-Id: I60b6f8ed4c704bd5ad6cce7fce2b9095babe181e Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/276778 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/10563 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'payloads/libpayload')
-rw-r--r--payloads/libpayload/include/coreboot_tables.h1
-rw-r--r--payloads/libpayload/include/sysinfo.h2
-rw-r--r--payloads/libpayload/libc/coreboot.c11
3 files changed, 14 insertions, 0 deletions
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h
index 649cc2bb07..0c516b1e49 100644
--- a/payloads/libpayload/include/coreboot_tables.h
+++ b/payloads/libpayload/include/coreboot_tables.h
@@ -190,6 +190,7 @@ struct cb_gpios {
#define CB_TAG_VBOOT_HANDOFF 0x0020
#define CB_TAG_DMA 0x0022
#define CB_TAG_RAM_OOPS 0x0023
+#define CB_TAG_MTC 0x002b
struct lb_range {
uint32_t tag;
uint32_t size;
diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h
index bce5c8e4de..083f19de82 100644
--- a/payloads/libpayload/include/sysinfo.h
+++ b/payloads/libpayload/include/sysinfo.h
@@ -124,6 +124,8 @@ struct sysinfo_t {
uint32_t sector_size;
uint32_t erase_cmd;
} spi_flash;
+ uint64_t mtc_start;
+ uint32_t mtc_size;
};
extern struct sysinfo_t lib_sysinfo;
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index 999465cb82..43a9f09f1c 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -203,6 +203,14 @@ static void cb_parse_ramoops(void *ptr, struct sysinfo_t *info)
info->ramoops_buffer_size = ramoops->range_size;
}
+static void cb_parse_mtc(void *ptr, struct sysinfo_t *info)
+{
+ struct lb_range *mtc = (struct lb_range *)ptr;
+
+ info->mtc_start = mtc->range_start;
+ info->mtc_size = mtc->range_size;
+}
+
static void cb_parse_spi_flash(void *ptr, struct sysinfo_t *info)
{
struct cb_spi_flash *flash = (struct cb_spi_flash *)ptr;
@@ -361,6 +369,9 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_SPI_FLASH:
cb_parse_spi_flash(ptr, info);
break;
+ case CB_TAG_MTC:
+ cb_parse_mtc(ptr, info);
+ break;
default:
cb_parse_arch_specific(rec, info);
break;