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authorRaul E Rangel <rrangel@chromium.org>2018-08-06 16:12:37 -0600
committerMartin Roth <martinroth@google.com>2018-08-08 21:57:22 +0000
commit8346a44dd10ae24f309324df621d6be0c2acd1df (patch)
treeef4164979619067ed0b37ae7008acd99b89c802f /payloads/libpayload
parentcc6dc90f30b145ac8c81e4c438703dcaee2a351a (diff)
downloadcoreboot-8346a44dd10ae24f309324df621d6be0c2acd1df.tar.xz
libpayload/drivers/usb/xhci: Replace raw values with constants
BUG=none TEST=compiled on grunt and made sure USB still works in depthcharge Change-Id: I972f4604bb5ff3838cb15f323c5a579ad890ecf5 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27883 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'payloads/libpayload')
-rw-r--r--payloads/libpayload/drivers/usb/xhci.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c
index 8972ffaf1d..3f1064a405 100644
--- a/payloads/libpayload/drivers/usb/xhci.c
+++ b/payloads/libpayload/drivers/usb/xhci.c
@@ -304,10 +304,10 @@ xhci_pci_init (pcidev_t addr)
u32 reg_addr;
hci_t *controller;
- reg_addr = pci_read_config32 (addr, 0x10) & ~0xf;
- if (pci_read_config32 (addr, 0x14) > 0) {
+ reg_addr = pci_read_config32(addr, PCI_BASE_ADDRESS_0) &
+ PCI_BASE_ADDRESS_MEM_MASK;
+ if (pci_read_config32(addr, PCI_BASE_ADDRESS_1) > 0)
fatal("We don't do 64bit addressing.\n");
- }
controller = xhci_init((unsigned long)reg_addr);
if (controller) {