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authorPatrick Georgi <pgeorgi@chromium.org>2016-02-08 21:17:12 +0100
committerPatrick Georgi <pgeorgi@google.com>2016-02-09 21:53:42 +0100
commitd4adf58e03164615a64ba614d9353301ee8e7abd (patch)
treef6ad5d41bdb7b03d8d465451659b6fb3f3502058 /payloads/libpayload
parent42636a7a0cfeff36988fad97337a9d88e4f0e7b2 (diff)
downloadcoreboot-d4adf58e03164615a64ba614d9353301ee8e7abd.tar.xz
libpayload: use 32bit access when accessing 4byte wide uart registers
This fixes serial on rk3288. Change-Id: I3dbf3cc165e516ed7b0132332624f882c0c9b27f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/13636 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'payloads/libpayload')
-rw-r--r--payloads/libpayload/drivers/serial/8250.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/payloads/libpayload/drivers/serial/8250.c b/payloads/libpayload/drivers/serial/8250.c
index 7fe9920a6c..0386f23a57 100644
--- a/payloads/libpayload/drivers/serial/8250.c
+++ b/payloads/libpayload/drivers/serial/8250.c
@@ -46,7 +46,10 @@ static uint8_t serial_read_reg(int offset)
return inb(IOBASE + offset);
else
#endif
- return readb(MEMBASE + offset);
+ if (lib_sysinfo.serial->regwidth == 4)
+ return readl(MEMBASE + offset) & 0xff;
+ else
+ return readb(MEMBASE + offset);
}
static void serial_write_reg(uint8_t val, int offset)
@@ -58,7 +61,10 @@ static void serial_write_reg(uint8_t val, int offset)
outb(val, IOBASE + offset);
else
#endif
- writeb(val, MEMBASE + offset);
+ if (lib_sysinfo.serial->regwidth == 4)
+ writel(val & 0xff, MEMBASE + offset);
+ else
+ writeb(val, MEMBASE + offset);
}
#if IS_ENABLED(CONFIG_LP_SERIAL_SET_SPEED)