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| author | Tim Chen <tim-chen@quanta.corp-partner.google.com> | 2020-04-23 15:48:17 +0800 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-04-30 06:44:08 +0000 |
| commit | a932f6e507e1e77755c9670f0ee6aaf77ca5d83c (patch) | |
| tree | af7bc37974624847ded914c53a80e0a7d70244cb /payloads | |
| parent | 6c1a669b444fc7e6d7542ff910deca1a606d4c29 (diff) | |
| download | coreboot-a932f6e507e1e77755c9670f0ee6aaf77ca5d83c.tar.xz | |
mb/google/puff: update USB2 strength
Based on USB SI report to fine tune the strength for USB2 port0.
BRANCH=none
BUG=b:153590143
TEST=build and test USB2 port0 function works fine.
Change-Id: I070c9e1c8153a680fb8f827889738a764d7ea9f4
Signed-off-by: Tim Chen <tim-chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'payloads')
0 files changed, 0 insertions, 0 deletions