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| author | Subrata Banik <subrata.banik@intel.com> | 2017-08-21 16:42:15 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-23 16:17:04 +0000 |
| commit | bd6ac22f48c517c72e3a5855c932bb5bea0e01fb (patch) | |
| tree | e566803b39a6406d8c7ef76c3e8aa1f179670cea /payloads | |
| parent | 53461ad1f89f31a091d6e055dedbb9c0b014ac86 (diff) | |
| download | coreboot-bd6ac22f48c517c72e3a5855c932bb5bea0e01fb.tar.xz | |
soc/intel/common: Add functions into common system agent library
This patch to add helper functions for memory layout design
based on PCI Host Bridge/DRAM registers.
BRANCH=none
BUG=b:63974384
TEST=Build and boot eve successfully.
Change-Id: I95250ef493c9844b8c46528f1f7de8a42cba88a2
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/21133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'payloads')
0 files changed, 0 insertions, 0 deletions