diff options
| author | Julius Werner <jwerner@chromium.org> | 2016-08-05 21:27:47 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-13 02:46:19 +0200 |
| commit | 1143d08f7e0a5c203312f054a08301445cafdec8 (patch) | |
| tree | 469ada8209572fb7442e03341dc7b47ca9686bb0 /payloads | |
| parent | 55ffccfbaea62c4c8e5a69c8956441758d657eb1 (diff) | |
| download | coreboot-1143d08f7e0a5c203312f054a08301445cafdec8.tar.xz | |
libpayload: head.S: Avoid clearing BSS (and heap) again
3 out of 4 architectures currently zero out the payload BSS in early
assembly code, which is pointless since the code loading the payload has
already done that (with a more efficient memset). ARM64 has never had
any code like this and can run just fine without it. This also defeats
the new optimization of moving the heap out of the BSS, since all three
implementations assume that everything between _edata and _end is BSS.
We should just take this out.
Change-Id: I45cd2dabd94da43ff0f77e990f11c877cee6cda1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16091
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads')
| -rw-r--r-- | payloads/libpayload/arch/arm/head.S | 19 | ||||
| -rw-r--r-- | payloads/libpayload/arch/mips/head.S | 10 | ||||
| -rw-r--r-- | payloads/libpayload/arch/x86/head.S | 8 |
3 files changed, 0 insertions, 37 deletions
diff --git a/payloads/libpayload/arch/arm/head.S b/payloads/libpayload/arch/arm/head.S index 788e328322..299faf2c4f 100644 --- a/payloads/libpayload/arch/arm/head.S +++ b/payloads/libpayload/arch/arm/head.S @@ -33,22 +33,6 @@ * Our entry point */ ENTRY(_entry) - - /* TODO: disable interrupts */ - - /* Clear BSS */ - mov r12, #0 - ldr r2, bss_boundaries - ldr r3, bss_boundaries + 4 - cmp r2, r3 - beq no_bss - - sub r3, #4 /* Account for late condition check. */ -loop: - cmp r2, r3 - str r12, [r2], #4 - blt loop -no_bss: /* Save off the location of the coreboot tables */ ldr r1, 1f str r0, [r1] @@ -70,9 +54,6 @@ no_bss: ENDPROC(_entry) .align 4 -bss_boundaries: - .word _edata - .word _end 1: .word cb_header_ptr 2: diff --git a/payloads/libpayload/arch/mips/head.S b/payloads/libpayload/arch/mips/head.S index c143e95844..203e0ae1bf 100644 --- a/payloads/libpayload/arch/mips/head.S +++ b/payloads/libpayload/arch/mips/head.S @@ -74,16 +74,6 @@ _entry: 1: lw $gp, 0($ra) - /* Clear .bss: start_bss = _edata, end_bss = _end */ - la $t0, _edata - sw $zero, ($t0) - la $t1, _end - 4 -clear_bss: - addiu $t0, 4 - sw $zero, ($t0) - bne $t0, $t1, clear_bss - nop - /* Save off the location of the coreboot tables */ la $at, cb_header_ptr sw $a0, 0x00($at) diff --git a/payloads/libpayload/arch/x86/head.S b/payloads/libpayload/arch/x86/head.S index 3dd61336f9..fa9bb7374f 100644 --- a/payloads/libpayload/arch/x86/head.S +++ b/payloads/libpayload/arch/x86/head.S @@ -73,14 +73,6 @@ _init: movl %eax,loader_eax movl %ebx,loader_ebx - /* Clear the bss */ - cld - movl $.bss, %edi - movl $_end, %ecx - subl %edi, %ecx - xor %ax, %ax - rep stosb - /* Setup new stack. */ movl $_stack, %ebx |