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authorAnton Kochkov <anton.kochkov@gmail.com>2012-06-20 04:03:37 +0400
committerPatrick Georgi <patrick@georgi-clan.de>2012-06-21 08:42:06 +0200
commit2e33a65a8c115a46fdf6101ac57fd89602d1b264 (patch)
tree786352f105772db0ba81c23e37230875f6de4150 /payloads
parent904a0ec9d0ae4f4af8bcb13363d6766a6feace6a (diff)
downloadcoreboot-2e33a65a8c115a46fdf6101ac57fd89602d1b264.tar.xz
libpayload: reg_base reading for USB EHCI driver
Added reading registers base address for USB EHCI driver in ehci_init() function. Change-Id: I59443ca9823588d70822b4f14486caf217a5ac26 Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1106 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'payloads')
-rw-r--r--payloads/libpayload/drivers/usb/ehci.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c
index 1094c78560..1cb1535978 100644
--- a/payloads/libpayload/drivers/usb/ehci.c
+++ b/payloads/libpayload/drivers/usb/ehci.c
@@ -623,13 +623,14 @@ ehci_init (pcidev_t addr)
controller->destroy_intr_queue = ehci_destroy_intr_queue;
controller->poll_intr_queue = ehci_poll_intr_queue;
controller->bus_address = addr;
+ controller->reg_base = pci_read_config32 (controller->bus_address, USBBASE);
for (i = 0; i < 128; i++) {
controller->devices[i] = 0;
}
init_device_entry (controller, 0);
- EHCI_INST(controller)->capabilities = phys_to_virt(pci_read_config32(addr, USBBASE));
- EHCI_INST(controller)->operation = (hc_op_t *)(phys_to_virt(pci_read_config32(addr, USBBASE)) + EHCI_INST(controller)->capabilities->caplength);
+ EHCI_INST(controller)->capabilities = phys_to_virt(controller->reg_base);
+ EHCI_INST(controller)->operation = (hc_op_t *)(phys_to_virt(controller->reg_base) + EHCI_INST(controller)->capabilities->caplength);
/* default value for frame length adjust */
pci_write_config8(addr, FLADJ, FLADJ_framelength(60000));