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authorFurquan Shaikh <furquan@google.com>2020-11-25 17:15:09 -0800
committerFurquan Shaikh <furquan@google.com>2020-12-08 22:56:09 +0000
commit493937e1d67e734c2ac45f92280f2c2c22a50b85 (patch)
tree16b77de5c971be7774935c8c98846bcead32c663 /payloads
parentb53280ab53e19746be04b67f73f9ce230038b1ee (diff)
downloadcoreboot-493937e1d67e734c2ac45f92280f2c2c22a50b85.tar.xz
coreboot tables: Add SPI flash memory map windows to coreboot tables
This change adds details about the memory map windows to translate addresses between SPI flash space and host address space to coreboot tables. This is useful for payloads to setup the translation using the decode windows already known to coreboot. Until now, there was a single decode window at the top of 4G used by all x86 platforms. However, going forward, platforms might support more decode windows and hence in order to avoid duplication in payloads this information is filled in coreboot tables. `lb_spi_flash()` is updated to fill in the details about these windows by making a call to `spi_flash_get_mmap_windows()` which is implemented by the driver providing the boot media mapping device. BUG=b:171534504 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads')
-rw-r--r--payloads/libpayload/include/coreboot_tables.h13
-rw-r--r--payloads/libpayload/include/sysinfo.h5
-rw-r--r--payloads/libpayload/libc/coreboot.c7
3 files changed, 25 insertions, 0 deletions
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h
index 64db83bbd4..e042a900b9 100644
--- a/payloads/libpayload/include/coreboot_tables.h
+++ b/payloads/libpayload/include/coreboot_tables.h
@@ -261,12 +261,25 @@ struct cb_x86_rom_mtrr {
uint32_t index;
};
+/* Memory map windows to translate addresses between SPI flash space and host address space. */
+struct flash_mmap_window {
+ uint32_t flash_base;
+ uint32_t host_base;
+ uint32_t size;
+};
+
struct cb_spi_flash {
uint32_t tag;
uint32_t size;
uint32_t flash_size;
uint32_t sector_size;
uint32_t erase_cmd;
+ /*
+ * Number of mmap windows used by the platform to decode addresses between SPI flash
+ * space and host address space. This determines the number of entries in mmap_table.
+ */
+ uint32_t mmap_count;
+ struct flash_mmap_window mmap_table[0];
};
struct cb_boot_media_params {
diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h
index dd739abab4..5a24e1405f 100644
--- a/payloads/libpayload/include/sysinfo.h
+++ b/payloads/libpayload/include/sysinfo.h
@@ -40,6 +40,9 @@
/* Up to 10 MAC addresses */
#define SYSINFO_MAX_MACS 10
+/* Maximum of 2 MMAP windows for decoding SPI flash. */
+#define SYSINFO_MAX_MMAP_WINDOWS 2
+
#include <coreboot_tables.h>
/*
@@ -126,6 +129,8 @@ struct sysinfo_t {
uint32_t size;
uint32_t sector_size;
uint32_t erase_cmd;
+ uint32_t mmap_window_count;
+ struct flash_mmap_window mmap_table[SYSINFO_MAX_MMAP_WINDOWS];
} spi_flash;
uint64_t fmap_offset;
uint64_t cbfs_offset;
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index b7d2a537b5..7e23afe2e5 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -211,6 +211,13 @@ static void cb_parse_spi_flash(void *ptr, struct sysinfo_t *info)
info->spi_flash.size = flash->flash_size;
info->spi_flash.sector_size = flash->sector_size;
info->spi_flash.erase_cmd = flash->erase_cmd;
+
+ if (flash->mmap_count == 0)
+ return;
+
+ info->spi_flash.mmap_window_count = MIN(flash->mmap_count, SYSINFO_MAX_MMAP_WINDOWS);
+ memcpy(info->spi_flash.mmap_table, flash->mmap_table,
+ info->spi_flash.mmap_window_count * sizeof(struct flash_mmap_window));
}
static void cb_parse_boot_media_params(unsigned char *ptr,