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authorDuncan Laurie <dlaurie@chromium.org>2015-08-19 16:04:15 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-08-28 06:46:28 +0000
commit5c25d0e8cc150e6be5f6e305ed9a98abab1a8e2f (patch)
treeb5e95d7a3bd5a6c8c344b455b3ede6fe7a4a4995 /payloads
parente8a8a00342b8791b3c29827b33139aa5722b3f61 (diff)
downloadcoreboot-5c25d0e8cc150e6be5f6e305ed9a98abab1a8e2f.tar.xz
libpayload: x86: Add read/write{8,16,32} variants that match coreboot
Add the now coreboot standard MMIO read/write accessors that were already defined for other architectures but not x86. This leaves the old read/write{b,w,l} variants in place as was done on the other architectures, presumably to support old payloads that have not been updated. BUG=chrome-os-partner:43072 BRANCH=none TEST=emerge-glados libpayload CQ-DEPEND=CL:294711 Change-Id: I5ae3d755adcef0f6ff27aaa7c35a5b12ddc32e22 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: c09dd557050e3002fa5b8504980d72d4cb79a56c Original-Change-Id: I58d928338335d3fe4bb7fe2bdc9c2967d8689118 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/294565 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11405 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Diffstat (limited to 'payloads')
-rw-r--r--payloads/libpayload/include/x86/arch/io.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/payloads/libpayload/include/x86/arch/io.h b/payloads/libpayload/include/x86/arch/io.h
index cd48d7c35b..c417ce0c66 100644
--- a/payloads/libpayload/include/x86/arch/io.h
+++ b/payloads/libpayload/include/x86/arch/io.h
@@ -31,6 +31,16 @@
#ifndef _ARCH_IO_H
#define _ARCH_IO_H
+#include <inttypes.h>
+
+/*
+ * readb/w/l writeb/w/l are deprecated. use read8/16/32 and write8/16/32
+ * instead for future development.
+ *
+ * TODO: make the existing code use read8/16/32 and write8/16/32 then remove
+ * readb/w/l and writeb/w/l.
+ */
+
#define readb(_a) (*(volatile const unsigned char *) (_a))
#define readw(_a) (*(volatile const unsigned short *) (_a))
#define readl(_a) (*(volatile const unsigned int *) (_a))
@@ -39,6 +49,36 @@
#define writew(_v, _a) (*(volatile unsigned short *) (_a) = (_v))
#define writel(_v, _a) (*(volatile unsigned int *) (_a) = (_v))
+static inline __attribute__((always_inline)) uint8_t read8(const volatile void *addr)
+{
+ return *((volatile uint8_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint16_t read16(const volatile void *addr)
+{
+ return *((volatile uint16_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint32_t read32(const volatile void *addr)
+{
+ return *((volatile uint32_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) void write8(volatile void *addr, uint8_t value)
+{
+ *((volatile uint8_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write16(volatile void *addr, uint16_t value)
+{
+ *((volatile uint16_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write32(volatile void *addr, uint32_t value)
+{
+ *((volatile uint32_t *)(addr)) = value;
+}
+
static inline unsigned int inl(int port)
{
unsigned long val;