diff options
author | Aaron Durbin <adurbin@chromium.org> | 2013-01-15 15:15:32 -0600 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-19 05:11:50 +0100 |
commit | 98ffb426f40593f930388c006f8058c199defff4 (patch) | |
tree | 2cf6b6e95ceede3a8c8773f80bb2be48d4046c31 /payloads | |
parent | 3c734bb355b6cf15e61e3bc8755f622d4117e7c2 (diff) | |
download | coreboot-98ffb426f40593f930388c006f8058c199defff4.tar.xz |
intel microcode: split up microcode loading stages
This patch only applies to CONFIG_MICROCODE_IN_CBFS. The intel microcode
update routine would always walk the CBFS for the microcode file. Then
it would loop through the whole file looking for a match then load the
microcode. This process was maintained for intel_update_microcode_from_cbfs(),
however 2 new functions were exported:
1. const void *intel_microcode_find(void)
2. void intel_microcode_load_unlocked(const void *microcode_patch)
The first locates a matching microcode while the second loads that
mircocode. These new functions can then be used to cache the found
microcode blob w/o having to re-walk the CBFS.
Booted baskingridge board to Linux and noted that all microcode
revisions match on all the CPUs.
Change-Id: Ifde3f3e5c100911c4f984dd56d36664a8acdf7d5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2778
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'payloads')
0 files changed, 0 insertions, 0 deletions