summaryrefslogtreecommitdiff
path: root/src/Kconfig
diff options
context:
space:
mode:
authorKane Chen <kane.chen@intel.com>2017-10-16 19:40:18 +0800
committerAaron Durbin <adurbin@chromium.org>2017-10-31 15:49:55 +0000
commit66f1f382cd3bd5a7250e0a7ad35d9a1c505de47a (patch)
tree899e5780ab5d63b9e8d4a6d9402fe0d3f8f4c9e8 /src/Kconfig
parentdfd2a8b7e7bba6ccffb141f812f70b5bc608f37a (diff)
downloadcoreboot-66f1f382cd3bd5a7250e0a7ad35d9a1c505de47a.tar.xz
intel/common/smbus: increase spd read performance
This change increases the spd read performance by using smbus word access. BUG=b:67021853 TEST=boot to os and find 80~100 ms boot time improvement on one dimm Change-Id: I98fe67642d8ccd428bccbca7f6390331d6055d14 Signed-off-by: Kane Chen <kane.chen@intel.com> Reviewed-on: https://review.coreboot.org/22072 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/Kconfig')
-rw-r--r--src/Kconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/Kconfig b/src/Kconfig
index f853c66ed6..8873ec8cdc 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -1212,6 +1212,9 @@ config DIMM_SPD_SIZE
Total SPD size that will be used for DIMM.
Ex: DDR3 256, DDR4 512.
+config SPD_READ_BY_WORD
+ bool
+
config BOARD_ID_AUTO
bool
default n