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authorVadim Bendebury <vbendeb@chromium.org>2017-03-22 16:16:34 -0700
committerAaron Durbin <adurbin@chromium.org>2017-05-05 23:24:20 +0200
commitb9126fe46cb7432b9d9d1f4ca8b557e50e303380 (patch)
tree5e6905ba730f62bb6e9ecf3462ad262ce74a2fef /src/Kconfig
parentc623aa055d590501e14669277bfa3ba46c5ec22b (diff)
downloadcoreboot-b9126fe46cb7432b9d9d1f4ca8b557e50e303380.tar.xz
cr50: check if the new image needs to be enabled and act on it
The AP sends the Cr50 a request to enable the new firmware image. If the new Cr50 image was found and enabled, the AP expects the Cr50 to reset the device in 1 second. While waiting for the Cr50 to reset, the AP logs a newly defined event and optionally shuts down the system. By default the x86 systems power off as shutting those systems down is not board specific. BRANCH=gru,reef BUG=b:35580805 TEST=built a reef image, observed that in case cr50 image is updated, after the next reboot the AP stops booting before loading depthcharge, reports upcoming reset and waits for it. Once the system is booted after that, the new event can be found in the log: localhost ~ # mosys eventlog list ... 7 | 2017-03-23 18:42:12 | Chrome OS Developer Mode 8 | 2017-03-23 18:42:13 | Unknown | 0xac 9 | 2017-03-23 18:42:21 | System boot | 46 ... Change-Id: I45fd6058c03f32ff8edccd56ca2aa5359d9b21b1 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/18946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/Kconfig')
-rw-r--r--src/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 49f8672ff2..ffaf7eb25e 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -406,11 +406,17 @@ config TPM2
If unsure, say N.
+config POWER_OFF_ON_CR50_UPDATE
+ bool
+ help
+ Power off machine while waiting for CR50 update to take effect.
+
config MAINBOARD_HAS_TPM_CR50
bool
default y if MAINBOARD_HAS_SPI_TPM_CR50 || MAINBOARD_HAS_I2C_TPM_CR50
default n
select MAINBOARD_HAS_TPM2
+ select POWER_OFF_ON_CR50_UPDATE if ARCH_X86
config HEAP_SIZE
hex