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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-09-28 21:39:12 -0700 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-10-03 22:22:54 +0000 |
| commit | ecf2eb463faff04ab6061eb5dfd8da26c5026a97 (patch) | |
| tree | 4eca305b3d9e4b7d29caa664a1a1a923a06fa224 /src/Kconfig | |
| parent | ac1f4b86f4a82f00c07aa21707703c5c70d9c604 (diff) | |
| download | coreboot-ecf2eb463faff04ab6061eb5dfd8da26c5026a97.tar.xz | |
sandybridge ivybridge: Treat native init as first class citizen
This is a sad story. We have three different code paths for
sandybridge and ivybridge: proper native path, google MRC path, and,
everyone's favorite: Intel FSP path. For the purpose of this patch,
the FSP path lives in its own little world, and doesn't concern us.
Since MRC was first, when native files and variables were added, they
were suffixed with "_native" to separate them from the existing code.
This can cause confusion, as the suffix might make the native files
seem parasitical.
This has been bothering me for many months. MRC should be the
parasitical path, especially since we fully support native init, and
it works more reliably, on a wider range of hardware. There have been
a few board ports that never made it to coreboot.org because MRC would
hang.
gigabyte/ga-b75m-d3h is a prime example: it did not work with MRC, so
the effort was abandoned at first. Once the native path became
available, the effort was restarted and the board is now supported.
In honor of the hackers and pioneers who made the native code
possible, rename things so that their effort is the first class
citizen.
Change-Id: Ic86cee5e00bf7f598716d3d15d1ea81ca673932f
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11788
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Diffstat (limited to 'src/Kconfig')
| -rw-r--r-- | src/Kconfig | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/Kconfig b/src/Kconfig index 2c75750ecc..902855ec8d 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -246,8 +246,8 @@ config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM config FLASHMAP_OFFSET hex "Flash Map Offset" - default 0x00670000 if NORTHBRIDGE_INTEL_SANDYBRIDGE - default 0x00610000 if NORTHBRIDGE_INTEL_IVYBRIDGE + default 0x00670000 if NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC + default 0x00610000 if NORTHBRIDGE_INTEL_IVYBRIDGE_MRC default CBFS_SIZE if !ARCH_X86 default 0 help @@ -337,9 +337,9 @@ source "src/mainboard/Kconfig" config CBFS_SIZE hex "Size of CBFS filesystem in ROM" default 0x100000 if HAVE_INTEL_FIRMWARE || \ - NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_SANDYBRIDGE || \ - NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE || \ - NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE || \ + NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC || \ + NORTHBRIDGE_INTEL_IVYBRIDGE_MRC || NORTHBRIDGE_INTEL_IVYBRIDGE || \ + NORTHBRIDGE_INTEL_SANDYBRIDGE || \ NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BRASWELL || \ SOC_INTEL_BROADWELL default 0x200000 if SOC_INTEL_SKYLAKE |