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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-08-28 19:52:05 -0500
committerMartin Roth <martinroth@google.com>2015-12-18 19:47:01 +0100
commit7b22d84d55386ee422fa77c1d8bce9dddeaaa231 (patch)
tree7c1afd131b1c3a504bae653cffb3e87d5062dac0 /src/Kconfig
parent5a3f1e54d55b416361d486d3b9136c65b6847242 (diff)
downloadcoreboot-7b22d84d55386ee422fa77c1d8bce9dddeaaa231.tar.xz
drivers/pc80: Add optional spinlock for nvram CBFS access
When enabling the IOMMU on certain systems dmesg is spammed with I/O page faults like the following: AMD-Vi: Event logged [IO_PAGE_FAULT device=00:14.0 domain=0x000a address=0x000000fdf9103300 flags=0x0030] Decoding the faulting address: 0x000000fdf9103300 fdf91x Hypertransport system management region 33 SysMgtCmd (System Management Command) = 0x33 3 Base Command Type = 0x3: STPCLK (Stop Clock request) 3 SMAF (System Management Action Field) = [3:1] = 0x1 1 Signal State Bit Map = [0] = 0x1 Therefore, the error appears to be triggered by an upstream C1E request. This was eventually traced to concurrent access to the SP5100's SPI Flash controller by multiple APs during startup. Calls to the nvram read functions get_option and read_option call CBFS functions, which in turn make near-simultaneous requests to the SPI Flash controller, thus placing the SP5100 in an invalid state. This limitation is not documented in any public AMD errata, and was only discovered through considerable debugging effort. Change-Id: I4e61b1ab767b1b7958ac7c1cf20eee41d2261bef Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12061 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/Kconfig')
-rw-r--r--src/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 6fbc1f0b10..38cf855cc8 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -480,6 +480,14 @@ config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
bool
default n
+config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
+ bool
+ default n
+ help
+ This should be enabled on certain plaforms, such as the AMD
+ SR565x, that cannot handle concurrent CBFS accesses from
+ multiple APs during early startup.
+
config HAVE_MONOTONIC_TIMER
def_bool n
help