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authorJohn Zhao <john.zhao@intel.com>2021-04-17 16:03:21 -0700
committerNico Huber <nico.h@gmx.de>2021-04-22 10:15:11 +0000
commit091532d8ee34116e0a8c5a7775f971ada895c4c9 (patch)
tree6c9a16e1c353509b5ad17417ff3c3830e9da28cf /src/acpi
parentf095d15d0ef63971ee3c56dde3619d741d2b95c0 (diff)
downloadcoreboot-091532d8ee34116e0a8c5a7775f971ada895c4c9.tar.xz
ACPI: Fix the devices scope in the SATC structure
This change adds the ATC_REQUIRED flag for the address translation cache indicator and fixes the devices scope entry in the SATC reporting structure. The SoC integrated devices in the specified PCI segment with address translation caches are a type of PCI Endpoint Device. BUG=None TEST=Built image successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I57b3551f11502da48f3951da59d9426df5a40723 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52479 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/acpi')
-rw-r--r--src/acpi/acpi.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index b350bc389e..64af505941 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -638,17 +638,15 @@ unsigned long acpi_create_dmar_andd(unsigned long current, u8 device_number,
return andd->length;
}
-unsigned long acpi_create_dmar_satc(unsigned long current, u8 flags,
- u16 segment, const char *device_scope)
+unsigned long acpi_create_dmar_satc(unsigned long current, u8 flags, u16 segment)
{
dmar_satc_entry_t *satc = (dmar_satc_entry_t *)current;
- int satc_len = sizeof(dmar_satc_entry_t) + strlen(device_scope) + 1;
+ int satc_len = sizeof(dmar_satc_entry_t);
memset(satc, 0, satc_len);
satc->type = DMAR_SATC;
satc->length = satc_len;
satc->flags = flags;
satc->segment_number = segment;
- memcpy(&satc->device_scope, device_scope, strlen(device_scope));
return satc->length;
}