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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-03-16 13:02:34 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-30 06:49:04 +0000 |
| commit | 2ad598f3db4ff379a32aea27f0efb5a2449a8191 (patch) | |
| tree | c36c22d2b1552a4380b317387fc90e52947b331c /src/acpi | |
| parent | bc441c72ce7739a5a4ef647e3331afe5fbddc86e (diff) | |
| download | coreboot-2ad598f3db4ff379a32aea27f0efb5a2449a8191.tar.xz | |
ACPI: Use acpigen for NVS OperationRegions
The intermediate base and length are not required in ASL.
Change-Id: I0c72e2e4f7ec597adc16dbdec1fd7bbe4e41bfd6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51637
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lance Zhao
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/acpi')
| -rw-r--r-- | src/acpi/acpigen_extern.asl | 12 | ||||
| -rw-r--r-- | src/acpi/gnvs.c | 28 |
2 files changed, 16 insertions, 24 deletions
diff --git a/src/acpi/acpigen_extern.asl b/src/acpi/acpigen_extern.asl index 117177ea27..1a6217adb8 100644 --- a/src/acpi/acpigen_extern.asl +++ b/src/acpi/acpigen_extern.asl @@ -8,19 +8,13 @@ */ #if CONFIG(ACPI_SOC_NVS) -External (NVB0, IntObj) -External (NVS0, IntObj) -OperationRegion (GNVS, SystemMemory, NVB0, NVS0) +External (GNVS, OpRegionObj) #endif #if CONFIG(ACPI_HAS_DEVICE_NVS) -External (NVB1, IntObj) -External (NVS1, IntObj) -OperationRegion (DNVS, SystemMemory, NVB1, NVS1) +External (DNVS, OpRegionObj) #endif #if CONFIG(CHROMEOS_NVS) -External (NVB2, IntObj) -External (NVS2, IntObj) -OperationRegion (CNVS, SystemMemory, NVB2, NVS2) +External (CNVS, OpRegionObj) #endif diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index fc1a70db06..856c105cfe 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -69,6 +69,12 @@ __weak void mainboard_fill_gnvs(struct global_nvs *gnvs_) { } /* Called from write_acpi_tables() only on normal boot path. */ void acpi_fill_gnvs(void) { + const struct opregion gnvs_op = OPREGION("GNVS", SYSTEMMEMORY, (uintptr_t)gnvs, 0x100); + const struct opregion cnvs_op = OPREGION("CNVS", SYSTEMMEMORY, + (uintptr_t)gnvs + GNVS_CHROMEOS_ACPI_OFFSET, 0xf00); + const struct opregion dnvs_op = OPREGION("DNVS", SYSTEMMEMORY, + (uintptr_t)gnvs + GNVS_DEVICE_NVS_OFFSET, 0x1000); + if (!gnvs) return; @@ -76,23 +82,15 @@ void acpi_fill_gnvs(void) mainboard_fill_gnvs(gnvs); acpigen_write_scope("\\"); - acpigen_write_name_dword("NVB0", (uintptr_t)gnvs); - acpigen_write_name_dword("NVS0", 0x100); - acpigen_pop_len(); + acpigen_write_opregion(&gnvs_op); - if (CONFIG(CHROMEOS_NVS)) { - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVB2", (uintptr_t)gnvs + GNVS_CHROMEOS_ACPI_OFFSET); - acpigen_write_name_dword("NVS2", 0xf00); - acpigen_pop_len(); - } + if (CONFIG(CHROMEOS_NVS)) + acpigen_write_opregion(&cnvs_op); - if (CONFIG(ACPI_HAS_DEVICE_NVS)) { - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVB1", (uintptr_t)gnvs + GNVS_DEVICE_NVS_OFFSET); - acpigen_write_name_dword("NVS1", 0x1000); - acpigen_pop_len(); - } + if (CONFIG(ACPI_HAS_DEVICE_NVS)) + acpigen_write_opregion(&dnvs_op); + + acpigen_pop_len(); } int acpi_reset_gnvs_for_wake(struct global_nvs **gnvs_) |