acpi: Move ACPI table support out of arch/x86 (1/5)

This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own directory.

In order to make it easier to review, this change is being split into
multiple CLs. This is change 1/5 which moves .c files from arch/x86 to
acpi/.

The only acpi files that are still retained under arch/x86 are:
a. acpi_s3.c: This doesn't really deal with ACPI tables. Also, there
are some assumptions in there about SMM which will have to be resolved
if this file needs to be moved to common code.

b. acpi_bert_storage.c/bert_storage.h: This file is currently written
specifically with x86 in mind. So, not moving the file for now.

Motivation for this change: Not all stages on Picasso SoC are targeted
for the same architecture. For example, verstage (if runs before
bootblock) will be targeted for non-x86. This makes it difficult to
add device tree to verstage which would be required to get to SoC
configs from the tree. This is because the device tree on x86
platforms currently contains a lot of devices that require ACPI
related enums and structs (like acpi_gpio, acpi_pld, acpi_dp and so
on). Hence, this change removes all ACPI table support out of
arch/x86.

BUG=b:155428745

Change-Id: Icc6b793c52c86483a8c52e0555619e36869a869e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

7 files changed, 5016 insertions, 1 deletions

diff --git a/src/acpi/Makefile.inc b/src/acpi/Makefile.inc
index e99110ec24..068c592db7 100644
--- a/src/acpi/Makefile.inc
+++ b/src/acpi/Makefile.inc
@@ -1,4 +1,15 @@
 # SPDX-License-Identifier: GPL-2.0-only
 # This file is part of the coreboot project.
 
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sata.c
+ifeq ($(CONFIG_HAVE_ACPI_TABLES),y)
+
+ramstage-y += acpi.c
+ramstage-y += acpi_device.c
+ramstage-y += acpi_pld.c
+ramstage-y += acpigen.c
+ramstage-y += acpigen_dsm.c
+ramstage-y += acpigen_ps2_keybd.c
+
+ramstage-y += sata.c
+
+endif # CONFIG_GENERATE_ACPI_TABLES
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
new file mode 100644
index 0000000000..8e7b51d79d
--- /dev/null
+++ b/src/acpi/acpi.c
@@ -0,0 +1,1641 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+/*
+ * coreboot ACPI Table support
+ */
+
+/*
+ * Each system port implementing ACPI has to provide two functions:
+ *
+ *   write_acpi_tables()
+ *   acpi_dump_apics()
+ *
+ * See Kontron 986LCD-M port for a good example of an ACPI implementation
+ * in coreboot.
+ */
+
+#include <console/console.h>
+#include <string.h>
+#include <arch/acpi.h>
+#include <arch/acpi_ivrs.h>
+#include <arch/acpigen.h>
+#include <device/pci.h>
+#include <cbmem.h>
+#include <commonlib/helpers.h>
+#include <cpu/cpu.h>
+#include <cbfs.h>
+#include <version.h>
+#include <commonlib/sort.h>
+
+static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp);
+
+u8 acpi_checksum(u8 *table, u32 length)
+{
+	u8 ret = 0;
+	while (length--) {
+		ret += *table;
+		table++;
+	}
+	return -ret;
+}
+
+/**
+ * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
+ * and checksum.
+ */
+void acpi_add_table(acpi_rsdp_t *rsdp, void *table)
+{
+	int i, entries_num;
+	acpi_rsdt_t *rsdt;
+	acpi_xsdt_t *xsdt = NULL;
+
+	/* The RSDT is mandatory... */
+	rsdt = (acpi_rsdt_t *)(uintptr_t)rsdp->rsdt_address;
+
+	/* ...while the XSDT is not. */
+	if (rsdp->xsdt_address)
+		xsdt = (acpi_xsdt_t *)((uintptr_t)rsdp->xsdt_address);
+
+	/* This should always be MAX_ACPI_TABLES. */
+	entries_num = ARRAY_SIZE(rsdt->entry);
+
+	for (i = 0; i < entries_num; i++) {
+		if (rsdt->entry[i] == 0)
+			break;
+	}
+
+	if (i >= entries_num) {
+		printk(BIOS_ERR, "ACPI: Error: Could not add ACPI table, "
+			"too many tables.\n");
+		return;
+	}
+
+	/* Add table to the RSDT. */
+	rsdt->entry[i] = (uintptr_t)table;
+
+	/* Fix RSDT length or the kernel will assume invalid entries. */
+	rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i + 1));
+
+	/* Re-calculate checksum. */
+	rsdt->header.checksum = 0; /* Hope this won't get optimized away */
+	rsdt->header.checksum = acpi_checksum((u8 *)rsdt, rsdt->header.length);
+
+	/*
+	 * And now the same thing for the XSDT. We use the same index as for
+	 * now we want the XSDT and RSDT to always be in sync in coreboot.
+	 */
+	if (xsdt) {
+		/* Add table to the XSDT. */
+		xsdt->entry[i] = (u64)(uintptr_t)table;
+
+		/* Fix XSDT length. */
+		xsdt->header.length = sizeof(acpi_header_t) +
+					(sizeof(u64) * (i + 1));
+
+		/* Re-calculate checksum. */
+		xsdt->header.checksum = 0;
+		xsdt->header.checksum = acpi_checksum((u8 *)xsdt,
+							xsdt->header.length);
+	}
+
+	printk(BIOS_DEBUG, "ACPI: added table %d/%d, length now %d\n",
+		i + 1, entries_num, rsdt->header.length);
+}
+
+int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base,
+				u16 seg_nr, u8 start, u8 end)
+{
+	memset(mmconfig, 0, sizeof(*mmconfig));
+	mmconfig->base_address = base;
+	mmconfig->base_reserved = 0;
+	mmconfig->pci_segment_group_number = seg_nr;
+	mmconfig->start_bus_number = start;
+	mmconfig->end_bus_number = end;
+
+	return sizeof(acpi_mcfg_mmconfig_t);
+}
+
+int acpi_create_madt_lapic(acpi_madt_lapic_t *lapic, u8 cpu, u8 apic)
+{
+	lapic->type = LOCAL_APIC; /* Local APIC structure */
+	lapic->length = sizeof(acpi_madt_lapic_t);
+	lapic->flags = (1 << 0); /* Processor/LAPIC enabled */
+	lapic->processor_id = cpu;
+	lapic->apic_id = apic;
+
+	return lapic->length;
+}
+
+int acpi_create_madt_lx2apic(acpi_madt_lx2apic_t *lapic, u32 cpu, u32 apic)
+{
+	lapic->type = LOCAL_X2APIC; /* Local APIC structure */
+	lapic->reserved = 0;
+	lapic->length = sizeof(acpi_madt_lx2apic_t);
+	lapic->flags = (1 << 0); /* Processor/LAPIC enabled */
+	lapic->processor_id = cpu;
+	lapic->x2apic_id = apic;
+
+	return lapic->length;
+}
+
+unsigned long acpi_create_madt_lapics(unsigned long current)
+{
+	struct device *cpu;
+	int index, apic_ids[CONFIG_MAX_CPUS] = {0}, num_cpus = 0;
+
+	for (cpu = all_devices; cpu; cpu = cpu->next) {
+		if ((cpu->path.type != DEVICE_PATH_APIC) ||
+			(cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
+			continue;
+		}
+		if (!cpu->enabled)
+			continue;
+		if (num_cpus >= ARRAY_SIZE(apic_ids))
+			break;
+		apic_ids[num_cpus++] = cpu->path.apic.apic_id;
+	}
+	if (num_cpus > 1)
+		bubblesort(apic_ids, num_cpus, NUM_ASCENDING);
+	for (index = 0; index < num_cpus; index++) {
+		if (apic_ids[index] < 0xff)
+			current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current,
+					index, apic_ids[index]);
+		else
+			current += acpi_create_madt_lx2apic((acpi_madt_lx2apic_t *)current,
+					index, apic_ids[index]);
+	}
+
+	return current;
+}
+
+int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,
+				u32 gsi_base)
+{
+	ioapic->type = IO_APIC; /* I/O APIC structure */
+	ioapic->length = sizeof(acpi_madt_ioapic_t);
+	ioapic->reserved = 0x00;
+	ioapic->gsi_base = gsi_base;
+	ioapic->ioapic_id = id;
+	ioapic->ioapic_addr = addr;
+
+	return ioapic->length;
+}
+
+int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
+		u8 bus, u8 source, u32 gsirq, u16 flags)
+{
+	irqoverride->type = IRQ_SOURCE_OVERRIDE; /* Interrupt source override */
+	irqoverride->length = sizeof(acpi_madt_irqoverride_t);
+	irqoverride->bus = bus;
+	irqoverride->source = source;
+	irqoverride->gsirq = gsirq;
+	irqoverride->flags = flags;
+
+	return irqoverride->length;
+}
+
+int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu,
+				u16 flags, u8 lint)
+{
+	lapic_nmi->type = LOCAL_APIC_NMI; /* Local APIC NMI structure */
+	lapic_nmi->length = sizeof(acpi_madt_lapic_nmi_t);
+	lapic_nmi->flags = flags;
+	lapic_nmi->processor_id = cpu;
+	lapic_nmi->lint = lint;
+
+	return lapic_nmi->length;
+}
+
+int acpi_create_madt_lx2apic_nmi(acpi_madt_lx2apic_nmi_t *lapic_nmi, u32 cpu,
+				 u16 flags, u8 lint)
+{
+	lapic_nmi->type = LOCAL_X2APIC_NMI; /* Local APIC NMI structure */
+	lapic_nmi->length = sizeof(acpi_madt_lx2apic_nmi_t);
+	lapic_nmi->flags = flags;
+	lapic_nmi->processor_id = cpu;
+	lapic_nmi->lint = lint;
+	lapic_nmi->reserved[0] = 0;
+	lapic_nmi->reserved[1] = 0;
+	lapic_nmi->reserved[2] = 0;
+
+	return lapic_nmi->length;
+}
+
+__weak uintptr_t cpu_get_lapic_addr(void)
+{
+	/*
+	 * If an architecture does not support LAPIC, this weak implementation returns LAPIC
+	 * addr as 0.
+	 */
+	return 0;
+}
+
+void acpi_create_madt(acpi_madt_t *madt)
+{
+	acpi_header_t *header = &(madt->header);
+	unsigned long current = (unsigned long)madt + sizeof(acpi_madt_t);
+
+	memset((void *)madt, 0, sizeof(acpi_madt_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "APIC", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_madt_t);
+	header->revision = get_acpi_table_revision(MADT);
+
+	madt->lapic_addr = cpu_get_lapic_addr();
+	if (CONFIG(ACPI_HAVE_PCAT_8259))
+		madt->flags |= 1;
+
+	current = acpi_fill_madt(current);
+
+	/* (Re)calculate length and checksum. */
+	header->length = current - (unsigned long)madt;
+
+	header->checksum = acpi_checksum((void *)madt, header->length);
+}
+
+/* MCFG is defined in the PCI Firmware Specification 3.0. */
+void acpi_create_mcfg(acpi_mcfg_t *mcfg)
+{
+	acpi_header_t *header = &(mcfg->header);
+	unsigned long current = (unsigned long)mcfg + sizeof(acpi_mcfg_t);
+
+	memset((void *)mcfg, 0, sizeof(acpi_mcfg_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "MCFG", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_mcfg_t);
+	header->revision = get_acpi_table_revision(MCFG);
+
+	current = acpi_fill_mcfg(current);
+
+	/* (Re)calculate length and checksum. */
+	header->length = current - (unsigned long)mcfg;
+	header->checksum = acpi_checksum((void *)mcfg, header->length);
+}
+
+static void *get_tcpa_log(u32 *size)
+{
+	const struct cbmem_entry *ce;
+	const u32 tcpa_default_log_len = 0x10000;
+	void *lasa;
+	ce = cbmem_entry_find(CBMEM_ID_TCPA_TCG_LOG);
+	if (ce) {
+		lasa = cbmem_entry_start(ce);
+		*size = cbmem_entry_size(ce);
+		printk(BIOS_DEBUG, "TCPA log found at %p\n", lasa);
+		return lasa;
+	}
+	lasa = cbmem_add(CBMEM_ID_TCPA_TCG_LOG, tcpa_default_log_len);
+	if (!lasa) {
+		printk(BIOS_ERR, "TCPA log creation failed\n");
+		return NULL;
+	}
+
+	printk(BIOS_DEBUG, "TCPA log created at %p\n", lasa);
+	memset(lasa, 0, tcpa_default_log_len);
+
+	*size = tcpa_default_log_len;
+	return lasa;
+}
+
+static void acpi_create_tcpa(acpi_tcpa_t *tcpa)
+{
+	acpi_header_t *header = &(tcpa->header);
+	u32 tcpa_log_len;
+	void *lasa;
+
+	memset((void *)tcpa, 0, sizeof(acpi_tcpa_t));
+
+	lasa = get_tcpa_log(&tcpa_log_len);
+	if (!lasa)
+		return;
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "TCPA", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_tcpa_t);
+	header->revision = get_acpi_table_revision(TCPA);
+
+	tcpa->platform_class = 0;
+	tcpa->laml = tcpa_log_len;
+	tcpa->lasa = (uintptr_t) lasa;
+
+	/* Calculate checksum. */
+	header->checksum = acpi_checksum((void *)tcpa, header->length);
+}
+
+static void *get_tpm2_log(u32 *size)
+{
+	const struct cbmem_entry *ce;
+	const u32 tpm2_default_log_len = 0x10000;
+	void *lasa;
+	ce = cbmem_entry_find(CBMEM_ID_TPM2_TCG_LOG);
+	if (ce) {
+		lasa = cbmem_entry_start(ce);
+		*size = cbmem_entry_size(ce);
+		printk(BIOS_DEBUG, "TPM2 log found at %p\n", lasa);
+		return lasa;
+	}
+	lasa = cbmem_add(CBMEM_ID_TPM2_TCG_LOG, tpm2_default_log_len);
+	if (!lasa) {
+		printk(BIOS_ERR, "TPM2 log creation failed\n");
+		return NULL;
+	}
+
+	printk(BIOS_DEBUG, "TPM2 log created at %p\n", lasa);
+	memset(lasa, 0, tpm2_default_log_len);
+
+	*size = tpm2_default_log_len;
+	return lasa;
+}
+
+static void acpi_create_tpm2(acpi_tpm2_t *tpm2)
+{
+	acpi_header_t *header = &(tpm2->header);
+	u32 tpm2_log_len;
+	void *lasa;
+
+	memset((void *)tpm2, 0, sizeof(acpi_tpm2_t));
+
+	/*
+	 * Some payloads like SeaBIOS depend on log area to use TPM2.
+	 * Get the memory size and address of TPM2 log area or initialize it.
+	 */
+	lasa = get_tpm2_log(&tpm2_log_len);
+	if (!lasa)
+		tpm2_log_len = 0;
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "TPM2", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_tpm2_t);
+	header->revision = get_acpi_table_revision(TPM2);
+
+	/* Hard to detect for coreboot. Just set it to 0 */
+	tpm2->platform_class = 0;
+	if (CONFIG(CRB_TPM)) {
+		/* Must be set to 7 for CRB Support */
+		tpm2->control_area = CONFIG_CRB_TPM_BASE_ADDRESS + 0x40;
+		tpm2->start_method = 7;
+	} else {
+		/* Must be set to 0 for FIFO interface support */
+		tpm2->control_area = 0;
+		tpm2->start_method = 6;
+	}
+	memset(tpm2->msp, 0, sizeof(tpm2->msp));
+
+	/* Fill the log area size and start address fields. */
+	tpm2->laml = tpm2_log_len;
+	tpm2->lasa = (uintptr_t) lasa;
+
+	/* Calculate checksum. */
+	header->checksum = acpi_checksum((void *)tpm2, header->length);
+}
+
+static void acpi_ssdt_write_cbtable(void)
+{
+	const struct cbmem_entry *cbtable;
+	uintptr_t base;
+	uint32_t size;
+
+	cbtable = cbmem_entry_find(CBMEM_ID_CBTABLE);
+	if (!cbtable)
+		return;
+	base = (uintptr_t)cbmem_entry_start(cbtable);
+	size = cbmem_entry_size(cbtable);
+
+	acpigen_write_device("CTBL");
+	acpigen_write_coreboot_hid(COREBOOT_ACPI_ID_CBTABLE);
+	acpigen_write_name_integer("_UID", 0);
+	acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON);
+	acpigen_write_name("_CRS");
+	acpigen_write_resourcetemplate_header();
+	acpigen_write_mem32fixed(0, base, size);
+	acpigen_write_resourcetemplate_footer();
+	acpigen_pop_len();
+}
+
+void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id)
+{
+	unsigned long current = (unsigned long)ssdt + sizeof(acpi_header_t);
+
+	memset((void *)ssdt, 0, sizeof(acpi_header_t));
+
+	memcpy(&ssdt->signature, "SSDT", 4);
+	ssdt->revision = get_acpi_table_revision(SSDT);
+	memcpy(&ssdt->oem_id, OEM_ID, 6);
+	memcpy(&ssdt->oem_table_id, oem_table_id, 8);
+	ssdt->oem_revision = 42;
+	memcpy(&ssdt->asl_compiler_id, ASLC, 4);
+	ssdt->asl_compiler_revision = asl_revision;
+	ssdt->length = sizeof(acpi_header_t);
+
+	acpigen_set_current((char *) current);
+
+	/* Write object to declare coreboot tables */
+	acpi_ssdt_write_cbtable();
+
+	{
+		struct device *dev;
+		for (dev = all_devices; dev; dev = dev->next)
+			if (dev->ops && dev->ops->acpi_fill_ssdt)
+				dev->ops->acpi_fill_ssdt(dev);
+		current = (unsigned long) acpigen_get_current();
+	}
+
+	/* (Re)calculate length and checksum. */
+	ssdt->length = current - (unsigned long)ssdt;
+	ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length);
+}
+
+int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic)
+{
+	memset((void *)lapic, 0, sizeof(acpi_srat_lapic_t));
+
+	lapic->type = 0; /* Processor local APIC/SAPIC affinity structure */
+	lapic->length = sizeof(acpi_srat_lapic_t);
+	lapic->flags = (1 << 0); /* Enabled (the use of this structure). */
+	lapic->proximity_domain_7_0 = node;
+	/* TODO: proximity_domain_31_8, local SAPIC EID, clock domain. */
+	lapic->apic_id = apic;
+
+	return lapic->length;
+}
+
+int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
+				u32 flags)
+{
+	mem->type = 1; /* Memory affinity structure */
+	mem->length = sizeof(acpi_srat_mem_t);
+	mem->base_address_low = (basek << 10);
+	mem->base_address_high = (basek >> (32 - 10));
+	mem->length_low = (sizek << 10);
+	mem->length_high = (sizek >> (32 - 10));
+	mem->proximity_domain = node;
+	mem->flags = flags;
+
+	return mem->length;
+}
+
+/* http://www.microsoft.com/whdc/system/sysinternals/sratdwn.mspx */
+void acpi_create_srat(acpi_srat_t *srat,
+		      unsigned long (*acpi_fill_srat)(unsigned long current))
+{
+	acpi_header_t *header = &(srat->header);
+	unsigned long current = (unsigned long)srat + sizeof(acpi_srat_t);
+
+	memset((void *)srat, 0, sizeof(acpi_srat_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "SRAT", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_srat_t);
+	header->revision = get_acpi_table_revision(SRAT);
+
+	srat->resv = 1; /* Spec: Reserved to 1 for backwards compatibility. */
+
+	current = acpi_fill_srat(current);
+
+	/* (Re)calculate length and checksum. */
+	header->length = current - (unsigned long)srat;
+	header->checksum = acpi_checksum((void *)srat, header->length);
+}
+
+void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
+		      unsigned long (*acpi_fill_dmar)(unsigned long))
+{
+	acpi_header_t *header = &(dmar->header);
+	unsigned long current = (unsigned long)dmar + sizeof(acpi_dmar_t);
+
+	memset((void *)dmar, 0, sizeof(acpi_dmar_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "DMAR", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_dmar_t);
+	header->revision = get_acpi_table_revision(DMAR);
+
+	dmar->host_address_width = cpu_phys_address_size() - 1;
+	dmar->flags = flags;
+
+	current = acpi_fill_dmar(current);
+
+	/* (Re)calculate length and checksum. */
+	header->length = current - (unsigned long)dmar;
+	header->checksum = acpi_checksum((void *)dmar, header->length);
+}
+
+unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
+	u16 segment, u64 bar)
+{
+	dmar_entry_t *drhd = (dmar_entry_t *)current;
+	memset(drhd, 0, sizeof(*drhd));
+	drhd->type = DMAR_DRHD;
+	drhd->length = sizeof(*drhd); /* will be fixed up later */
+	drhd->flags = flags;
+	drhd->segment = segment;
+	drhd->bar = bar;
+
+	return drhd->length;
+}
+
+unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
+				    u64 bar, u64 limit)
+{
+	dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)current;
+	memset(rmrr, 0, sizeof(*rmrr));
+	rmrr->type = DMAR_RMRR;
+	rmrr->length = sizeof(*rmrr); /* will be fixed up later */
+	rmrr->segment = segment;
+	rmrr->bar = bar;
+	rmrr->limit = limit;
+
+	return rmrr->length;
+}
+
+unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
+	u16 segment)
+{
+	dmar_atsr_entry_t *atsr = (dmar_atsr_entry_t *)current;
+	memset(atsr, 0, sizeof(*atsr));
+	atsr->type = DMAR_ATSR;
+	atsr->length = sizeof(*atsr); /* will be fixed up later */
+	atsr->flags = flags;
+	atsr->segment = segment;
+
+	return atsr->length;
+}
+
+unsigned long acpi_create_dmar_rhsa(unsigned long current, u64 base_addr,
+	u32 proximity_domain)
+{
+	dmar_rhsa_entry_t *rhsa = (dmar_rhsa_entry_t *)current;
+	memset(rhsa, 0, sizeof(*rhsa));
+	rhsa->type = DMAR_RHSA;
+	rhsa->length = sizeof(*rhsa);
+	rhsa->base_address = base_addr;
+	rhsa->proximity_domain = proximity_domain;
+
+	return rhsa->length;
+}
+
+unsigned long acpi_create_dmar_andd(unsigned long current, u8 device_number,
+	const char *device_name)
+{
+	dmar_andd_entry_t *andd = (dmar_andd_entry_t *)current;
+	int andd_len = sizeof(dmar_andd_entry_t) + strlen(device_name) + 1;
+	memset(andd, 0, andd_len);
+	andd->type = DMAR_ANDD;
+	andd->length = andd_len;
+	andd->device_number = device_number;
+	memcpy(&andd->device_name, device_name, strlen(device_name));
+
+	return andd->length;
+}
+
+void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current)
+{
+	dmar_entry_t *drhd = (dmar_entry_t *)base;
+	drhd->length = current - base;
+}
+
+void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current)
+{
+	dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)base;
+	rmrr->length = current - base;
+}
+
+void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current)
+{
+	dmar_atsr_entry_t *atsr = (dmar_atsr_entry_t *)base;
+	atsr->length = current - base;
+}
+
+static unsigned long acpi_create_dmar_ds(unsigned long current,
+	enum dev_scope_type type, u8 enumeration_id, u8 bus, u8 dev, u8 fn)
+{
+	/* we don't support longer paths yet */
+	const size_t dev_scope_length = sizeof(dev_scope_t) + 2;
+
+	dev_scope_t *ds = (dev_scope_t *)current;
+	memset(ds, 0, dev_scope_length);
+	ds->type	= type;
+	ds->length	= dev_scope_length;
+	ds->enumeration	= enumeration_id;
+	ds->start_bus	= bus;
+	ds->path[0].dev	= dev;
+	ds->path[0].fn	= fn;
+
+	return ds->length;
+}
+
+unsigned long acpi_create_dmar_ds_pci_br(unsigned long current, u8 bus,
+	u8 dev, u8 fn)
+{
+	return acpi_create_dmar_ds(current,
+			SCOPE_PCI_SUB, 0, bus, dev, fn);
+}
+
+unsigned long acpi_create_dmar_ds_pci(unsigned long current, u8 bus,
+	u8 dev, u8 fn)
+{
+	return acpi_create_dmar_ds(current,
+			SCOPE_PCI_ENDPOINT, 0, bus, dev, fn);
+}
+
+unsigned long acpi_create_dmar_ds_ioapic(unsigned long current,
+	u8 enumeration_id, u8 bus, u8 dev, u8 fn)
+{
+	return acpi_create_dmar_ds(current,
+			SCOPE_IOAPIC, enumeration_id, bus, dev, fn);
+}
+
+unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current,
+	u8 enumeration_id, u8 bus, u8 dev, u8 fn)
+{
+	return acpi_create_dmar_ds(current,
+			SCOPE_MSI_HPET, enumeration_id, bus, dev, fn);
+}
+
+/* http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/slit.pdf */
+void acpi_create_slit(acpi_slit_t *slit,
+		      unsigned long (*acpi_fill_slit)(unsigned long current))
+{
+	acpi_header_t *header = &(slit->header);
+	unsigned long current = (unsigned long)slit + sizeof(acpi_slit_t);
+
+	memset((void *)slit, 0, sizeof(acpi_slit_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "SLIT", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_slit_t);
+	header->revision = get_acpi_table_revision(SLIT);
+
+	current = acpi_fill_slit(current);
+
+	/* (Re)calculate length and checksum. */
+	header->length = current - (unsigned long)slit;
+	header->checksum = acpi_checksum((void *)slit, header->length);
+}
+
+/* http://www.intel.com/hardwaredesign/hpetspec_1.pdf */
+void acpi_create_hpet(acpi_hpet_t *hpet)
+{
+	acpi_header_t *header = &(hpet->header);
+	acpi_addr_t *addr = &(hpet->addr);
+
+	memset((void *)hpet, 0, sizeof(acpi_hpet_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "HPET", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_hpet_t);
+	header->revision = get_acpi_table_revision(HPET);
+
+	/* Fill out HPET address. */
+	addr->space_id = 0; /* Memory */
+	addr->bit_width = 64;
+	addr->bit_offset = 0;
+	addr->addrl = CONFIG_HPET_ADDRESS & 0xffffffff;
+	addr->addrh = ((unsigned long long)CONFIG_HPET_ADDRESS) >> 32;
+
+	hpet->id = *(unsigned int *)CONFIG_HPET_ADDRESS;
+	hpet->number = 0;
+	hpet->min_tick = CONFIG_HPET_MIN_TICKS;
+
+	header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
+}
+
+void acpi_create_vfct(const struct device *device,
+		      acpi_vfct_t *vfct,
+		      unsigned long (*acpi_fill_vfct)(const struct device *device,
+		      acpi_vfct_t *vfct_struct, unsigned long current))
+{
+	acpi_header_t *header = &(vfct->header);
+	unsigned long current = (unsigned long)vfct + sizeof(acpi_vfct_t);
+
+	memset((void *)vfct, 0, sizeof(acpi_vfct_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "VFCT", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->revision = get_acpi_table_revision(VFCT);
+
+	current = acpi_fill_vfct(device, vfct, current);
+
+	/* If no BIOS image, return with header->length == 0. */
+	if (!vfct->VBIOSImageOffset)
+		return;
+
+	/* (Re)calculate length and checksum. */
+	header->length = current - (unsigned long)vfct;
+	header->checksum = acpi_checksum((void *)vfct, header->length);
+}
+
+void acpi_create_ipmi(const struct device *device,
+		      struct acpi_spmi *spmi,
+		      const u16 ipmi_revision,
+		      const acpi_addr_t *addr,
+		      const enum acpi_ipmi_interface_type type,
+		      const s8 gpe_interrupt,
+		      const u32 apic_interrupt,
+		      const u32 uid)
+{
+	acpi_header_t *header = &(spmi->header);
+	memset((void *)spmi, 0, sizeof(struct acpi_spmi));
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "SPMI", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(struct acpi_spmi);
+	header->revision = get_acpi_table_revision(SPMI);
+
+	spmi->reserved = 1;
+
+	if (device->path.type == DEVICE_PATH_PCI) {
+		spmi->pci_device_flag = ACPI_IPMI_PCI_DEVICE_FLAG;
+		spmi->pci_bus = device->bus->secondary;
+		spmi->pci_device = device->path.pci.devfn >> 3;
+		spmi->pci_function = device->path.pci.devfn & 0x7;
+	} else if (type != IPMI_INTERFACE_SSIF) {
+		memcpy(spmi->uid, &uid, sizeof(spmi->uid));
+	}
+
+	spmi->base_address = *addr;
+	spmi->specification_revision = ipmi_revision;
+
+	spmi->interface_type = type;
+
+	if (gpe_interrupt >= 0 && gpe_interrupt < 32) {
+		spmi->gpe = gpe_interrupt;
+		spmi->interrupt_type |= ACPI_IPMI_INT_TYPE_SCI;
+	}
+	if (apic_interrupt > 0) {
+		spmi->global_system_interrupt = apic_interrupt;
+		spmi->interrupt_type |= ACPI_IPMI_INT_TYPE_APIC;
+	}
+
+	/* Calculate checksum. */
+	header->checksum = acpi_checksum((void *)spmi, header->length);
+}
+
+void acpi_create_ivrs(acpi_ivrs_t *ivrs,
+		      unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct,
+		      unsigned long current))
+{
+	acpi_header_t *header = &(ivrs->header);
+	unsigned long current = (unsigned long)ivrs + sizeof(acpi_ivrs_t);
+
+	memset((void *)ivrs, 0, sizeof(acpi_ivrs_t));
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "IVRS", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_ivrs_t);
+	header->revision = get_acpi_table_revision(IVRS);
+
+	current = acpi_fill_ivrs(ivrs, current);
+
+	/* (Re)calculate length and checksum. */
+	header->length = current - (unsigned long)ivrs;
+	header->checksum = acpi_checksum((void *)ivrs, header->length);
+}
+
+unsigned long acpi_write_hpet(const struct device *device, unsigned long current,
+	acpi_rsdp_t *rsdp)
+{
+	acpi_hpet_t *hpet;
+
+	/*
+	 * We explicitly add these tables later on:
+	 */
+	printk(BIOS_DEBUG, "ACPI:    * HPET\n");
+
+	hpet = (acpi_hpet_t *) current;
+	current += sizeof(acpi_hpet_t);
+	current = ALIGN_UP(current, 16);
+	acpi_create_hpet(hpet);
+	acpi_add_table(rsdp, hpet);
+
+	return current;
+}
+
+void acpi_create_dbg2(acpi_dbg2_header_t *dbg2,
+		      int port_type, int port_subtype,
+		      acpi_addr_t *address, uint32_t address_size,
+		      const char *device_path)
+{
+	uintptr_t current;
+	acpi_dbg2_device_t *device;
+	uint32_t *dbg2_addr_size;
+	acpi_header_t *header;
+	size_t path_len;
+	const char *path;
+	char *namespace;
+
+	/* Fill out header fields. */
+	current = (uintptr_t)dbg2;
+	memset(dbg2, 0, sizeof(acpi_dbg2_header_t));
+	header = &(dbg2->header);
+
+	if (!header)
+		return;
+
+	header->revision = get_acpi_table_revision(DBG2);
+	memcpy(header->signature, "DBG2", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+	header->asl_compiler_revision = asl_revision;
+
+	/* One debug device defined */
+	dbg2->devices_offset = sizeof(acpi_dbg2_header_t);
+	dbg2->devices_count = 1;
+	current += sizeof(acpi_dbg2_header_t);
+
+	/* Device comes after the header */
+	device = (acpi_dbg2_device_t *)current;
+	memset(device, 0, sizeof(acpi_dbg2_device_t));
+	current += sizeof(acpi_dbg2_device_t);
+
+	device->revision = 0;
+	device->address_count = 1;
+	device->port_type = port_type;
+	device->port_subtype = port_subtype;
+
+	/* Base Address comes after device structure */
+	memcpy((void *)current, address, sizeof(acpi_addr_t));
+	device->base_address_offset = current - (uintptr_t)device;
+	current += sizeof(acpi_addr_t);
+
+	/* Address Size comes after address structure */
+	dbg2_addr_size = (uint32_t *)current;
+	device->address_size_offset = current - (uintptr_t)device;
+	*dbg2_addr_size = address_size;
+	current += sizeof(uint32_t);
+
+	/* Namespace string comes last, use '.' if not provided */
+	path = device_path ? : ".";
+	/* Namespace string length includes NULL terminator */
+	path_len = strlen(path) + 1;
+	namespace = (char *)current;
+	device->namespace_string_length = path_len;
+	device->namespace_string_offset = current - (uintptr_t)device;
+	strncpy(namespace, path, path_len);
+	current += path_len;
+
+	/* Update structure lengths and checksum */
+	device->length = current - (uintptr_t)device;
+	header->length = current - (uintptr_t)dbg2;
+	header->checksum = acpi_checksum((uint8_t *)dbg2, header->length);
+}
+
+unsigned long acpi_write_dbg2_pci_uart(acpi_rsdp_t *rsdp, unsigned long current,
+				const struct device *dev, uint8_t access_size)
+{
+	acpi_dbg2_header_t *dbg2 = (acpi_dbg2_header_t *)current;
+	struct resource *res;
+	acpi_addr_t address;
+
+	if (!dev) {
+		printk(BIOS_DEBUG, "%s: Device not found\n", __func__);
+		return current;
+	}
+	if (!dev->enabled) {
+		printk(BIOS_INFO, "%s: Device not enabled\n", __func__);
+		return current;
+	}
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	if (!res) {
+		printk(BIOS_ERR, "%s: Unable to find resource for %s\n",
+		       __func__, dev_path(dev));
+		return current;
+	}
+
+	memset(&address, 0, sizeof(address));
+	if (res->flags & IORESOURCE_IO)
+		address.space_id = ACPI_ADDRESS_SPACE_IO;
+	else if (res->flags & IORESOURCE_MEM)
+		address.space_id = ACPI_ADDRESS_SPACE_MEMORY;
+	else {
+		printk(BIOS_ERR, "%s: Unknown address space type\n", __func__);
+		return current;
+	}
+
+	address.addrl = (uint32_t)res->base;
+	address.addrh = (uint32_t)((res->base >> 32) & 0xffffffff);
+	address.access_size = access_size;
+
+	acpi_create_dbg2(dbg2,
+			 ACPI_DBG2_PORT_SERIAL,
+			 ACPI_DBG2_PORT_SERIAL_16550,
+			 &address, res->size,
+			 acpi_device_path(dev));
+
+	if (dbg2->header.length) {
+		current += dbg2->header.length;
+		current = acpi_align_current(current);
+		acpi_add_table(rsdp, dbg2);
+	}
+
+	return current;
+}
+
+void acpi_create_facs(acpi_facs_t *facs)
+{
+	memset((void *)facs, 0, sizeof(acpi_facs_t));
+
+	memcpy(facs->signature, "FACS", 4);
+	facs->length = sizeof(acpi_facs_t);
+	facs->hardware_signature = 0;
+	facs->firmware_waking_vector = 0;
+	facs->global_lock = 0;
+	facs->flags = 0;
+	facs->x_firmware_waking_vector_l = 0;
+	facs->x_firmware_waking_vector_h = 0;
+	facs->version = get_acpi_table_revision(FACS);
+}
+
+static void acpi_write_rsdt(acpi_rsdt_t *rsdt, char *oem_id, char *oem_table_id)
+{
+	acpi_header_t *header = &(rsdt->header);
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "RSDT", 4);
+	memcpy(header->oem_id, oem_id, 6);
+	memcpy(header->oem_table_id, oem_table_id, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_rsdt_t);
+	header->revision = get_acpi_table_revision(RSDT);
+
+	/* Entries are filled in later, we come with an empty set. */
+
+	/* Fix checksum. */
+	header->checksum = acpi_checksum((void *)rsdt, sizeof(acpi_rsdt_t));
+}
+
+static void acpi_write_xsdt(acpi_xsdt_t *xsdt, char *oem_id, char *oem_table_id)
+{
+	acpi_header_t *header = &(xsdt->header);
+
+	if (!header)
+		return;
+
+	/* Fill out header fields. */
+	memcpy(header->signature, "XSDT", 4);
+	memcpy(header->oem_id, oem_id, 6);
+	memcpy(header->oem_table_id, oem_table_id, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+
+	header->asl_compiler_revision = asl_revision;
+	header->length = sizeof(acpi_xsdt_t);
+	header->revision = get_acpi_table_revision(XSDT);
+
+	/* Entries are filled in later, we come with an empty set. */
+
+	/* Fix checksum. */
+	header->checksum = acpi_checksum((void *)xsdt, sizeof(acpi_xsdt_t));
+}
+
+static void acpi_write_rsdp(acpi_rsdp_t *rsdp, acpi_rsdt_t *rsdt,
+			    acpi_xsdt_t *xsdt, char *oem_id)
+{
+	memset(rsdp, 0, sizeof(acpi_rsdp_t));
+
+	memcpy(rsdp->signature, RSDP_SIG, 8);
+	memcpy(rsdp->oem_id, oem_id, 6);
+
+	rsdp->length = sizeof(acpi_rsdp_t);
+	rsdp->rsdt_address = (uintptr_t)rsdt;
+
+	/*
+	 * Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2.
+	 *
+	 * Some OSes expect an XSDT to be present for RSD PTR revisions >= 2.
+	 * If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR
+	 * revision 0).
+	 */
+	if (xsdt == NULL) {
+		rsdp->revision = 0;
+	} else {
+		rsdp->xsdt_address = (u64)(uintptr_t)xsdt;
+		rsdp->revision = get_acpi_table_revision(RSDP);
+	}
+
+	/* Calculate checksums. */
+	rsdp->checksum = acpi_checksum((void *)rsdp, 20);
+	rsdp->ext_checksum = acpi_checksum((void *)rsdp, sizeof(acpi_rsdp_t));
+}
+
+unsigned long acpi_create_hest_error_source(acpi_hest_t *hest,
+	acpi_hest_esd_t *esd, u16 type, void *data, u16 data_len)
+{
+	acpi_header_t *header = &(hest->header);
+	acpi_hest_hen_t *hen;
+	void *pos;
+	u16 len;
+
+	pos = esd;
+	memset(pos, 0, sizeof(acpi_hest_esd_t));
+	len = 0;
+	esd->type = type;		/* MCE */
+	esd->source_id = hest->error_source_count;
+	esd->flags = 0;		/* FIRMWARE_FIRST */
+	esd->enabled = 1;
+	esd->prealloc_erecords = 1;
+	esd->max_section_per_record = 0x1;
+
+	len += sizeof(acpi_hest_esd_t);
+	pos = esd + 1;
+
+	switch (type) {
+	case 0:			/* MCE */
+		break;
+	case 1:			/* CMC */
+		hen = (acpi_hest_hen_t *) (pos);
+		memset(pos, 0, sizeof(acpi_hest_hen_t));
+		hen->type = 3;		/* SCI? */
+		hen->length = sizeof(acpi_hest_hen_t);
+		hen->conf_we = 0;	/* Configuration Write Enable. */
+		hen->poll_interval = 0;
+		hen->vector = 0;
+		hen->sw2poll_threshold_val = 0;
+		hen->sw2poll_threshold_win = 0;
+		hen->error_threshold_val = 0;
+		hen->error_threshold_win = 0;
+		len += sizeof(acpi_hest_hen_t);
+		pos = hen + 1;
+		break;
+	case 2:			/* NMI */
+	case 6:			/* AER Root Port */
+	case 7:			/* AER Endpoint */
+	case 8:			/* AER Bridge */
+	case 9:			/* Generic Hardware Error Source. */
+		/* TODO: */
+		break;
+	default:
+		printk(BIOS_DEBUG, "Invalid type of Error Source.");
+		break;
+	}
+	hest->error_source_count++;
+
+	memcpy(pos, data, data_len);
+	len += data_len;
+	if (header)
+		header->length += len;
+
+	return len;
+}
+
+/* ACPI 4.0 */
+void acpi_write_hest(acpi_hest_t *hest,
+		     unsigned long (*acpi_fill_hest)(acpi_hest_t *hest))
+{
+	acpi_header_t *header = &(hest->header);
+
+	memset(hest, 0, sizeof(acpi_hest_t));
+
+	if (!header)
+		return;
+
+	memcpy(header->signature, "HEST", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+	header->asl_compiler_revision = asl_revision;
+	header->length += sizeof(acpi_hest_t);
+	header->revision = get_acpi_table_revision(HEST);
+
+	acpi_fill_hest(hest);
+
+	/* Calculate checksums. */
+	header->checksum = acpi_checksum((void *)hest, header->length);
+}
+
+/* ACPI 3.0b */
+void acpi_write_bert(acpi_bert_t *bert, uintptr_t region, size_t length)
+{
+	acpi_header_t *header = &(bert->header);
+
+	memset(bert, 0, sizeof(acpi_bert_t));
+
+	if (!header)
+		return;
+
+	memcpy(header->signature, "BERT", 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+	header->asl_compiler_revision = asl_revision;
+	header->length += sizeof(acpi_bert_t);
+	header->revision = get_acpi_table_revision(BERT);
+
+	bert->error_region = region;
+	bert->region_length = length;
+
+	/* Calculate checksums. */
+	header->checksum = acpi_checksum((void *)bert, header->length);
+}
+
+#if CONFIG(COMMON_FADT)
+void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
+{
+	acpi_header_t *header = &(fadt->header);
+
+	memset((void *) fadt, 0, sizeof(acpi_fadt_t));
+
+	if (!header)
+		return;
+
+	memcpy(header->signature, "FACP", 4);
+	header->length = sizeof(acpi_fadt_t);
+	header->revision = get_acpi_table_revision(FADT);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+	memcpy(header->asl_compiler_id, ASLC, 4);
+	header->asl_compiler_revision = asl_revision;
+
+	fadt->firmware_ctrl = (unsigned long) facs;
+	fadt->dsdt = (unsigned long) dsdt;
+
+	fadt->x_firmware_ctl_l = (unsigned long)facs;
+	fadt->x_firmware_ctl_h = 0;
+	fadt->x_dsdt_l = (unsigned long)dsdt;
+	fadt->x_dsdt_h = 0;
+
+	if (CONFIG(SYSTEM_TYPE_CONVERTIBLE) ||
+	    CONFIG(SYSTEM_TYPE_LAPTOP))
+		fadt->preferred_pm_profile = PM_MOBILE;
+	else if (CONFIG(SYSTEM_TYPE_DETACHABLE) ||
+		 CONFIG(SYSTEM_TYPE_TABLET))
+		fadt->preferred_pm_profile = PM_TABLET;
+	else
+		fadt->preferred_pm_profile = PM_DESKTOP;
+
+	acpi_fill_fadt(fadt);
+
+	header->checksum =
+	    acpi_checksum((void *) fadt, header->length);
+}
+#endif
+
+unsigned long __weak fw_cfg_acpi_tables(unsigned long start)
+{
+	return 0;
+}
+
+unsigned long write_acpi_tables(unsigned long start)
+{
+	unsigned long current;
+	acpi_rsdp_t *rsdp;
+	acpi_rsdt_t *rsdt;
+	acpi_xsdt_t *xsdt;
+	acpi_fadt_t *fadt;
+	acpi_facs_t *facs;
+	acpi_header_t *slic_file, *slic;
+	acpi_header_t *ssdt;
+	acpi_header_t *dsdt_file, *dsdt;
+	acpi_mcfg_t *mcfg;
+	acpi_tcpa_t *tcpa;
+	acpi_tpm2_t *tpm2;
+	acpi_madt_t *madt;
+	struct device *dev;
+	unsigned long fw;
+	size_t slic_size, dsdt_size;
+	char oem_id[6], oem_table_id[8];
+
+	current = start;
+
+	/* Align ACPI tables to 16byte */
+	current = acpi_align_current(current);
+
+	/* Special case for qemu */
+	fw = fw_cfg_acpi_tables(current);
+	if (fw) {
+		rsdp = NULL;
+		/* Find RSDP. */
+		for (void *p = (void *)current; p < (void *)fw; p += 16) {
+			if (valid_rsdp((acpi_rsdp_t *)p)) {
+				rsdp = p;
+				break;
+			}
+		}
+		if (!rsdp)
+			return fw;
+
+		/* Add BOOT0000 for Linux google firmware driver */
+		printk(BIOS_DEBUG, "ACPI:     * SSDT\n");
+		ssdt = (acpi_header_t *)fw;
+		current = (unsigned long)ssdt + sizeof(acpi_header_t);
+
+		memset((void *)ssdt, 0, sizeof(acpi_header_t));
+
+		memcpy(&ssdt->signature, "SSDT", 4);
+		ssdt->revision = get_acpi_table_revision(SSDT);
+		memcpy(&ssdt->oem_id, OEM_ID, 6);
+		memcpy(&ssdt->oem_table_id, oem_table_id, 8);
+		ssdt->oem_revision = 42;
+		memcpy(&ssdt->asl_compiler_id, ASLC, 4);
+		ssdt->asl_compiler_revision = asl_revision;
+		ssdt->length = sizeof(acpi_header_t);
+
+		acpigen_set_current((char *) current);
+
+		/* Write object to declare coreboot tables */
+		acpi_ssdt_write_cbtable();
+
+		/* (Re)calculate length and checksum. */
+		ssdt->length = current - (unsigned long)ssdt;
+		ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length);
+
+		acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR);
+
+		acpi_add_table(rsdp, ssdt);
+
+		return fw;
+	}
+
+	dsdt_file = cbfs_boot_map_with_leak(
+				     CONFIG_CBFS_PREFIX "/dsdt.aml",
+				     CBFS_TYPE_RAW, &dsdt_size);
+	if (!dsdt_file) {
+		printk(BIOS_ERR, "No DSDT file, skipping ACPI tables\n");
+		return current;
+	}
+
+	if (dsdt_file->length > dsdt_size
+	    || dsdt_file->length < sizeof(acpi_header_t)
+	    || memcmp(dsdt_file->signature, "DSDT", 4) != 0) {
+		printk(BIOS_ERR, "Invalid DSDT file, skipping ACPI tables\n");
+		return current;
+	}
+
+	slic_file = cbfs_boot_map_with_leak(CONFIG_CBFS_PREFIX "/slic",
+				     CBFS_TYPE_RAW, &slic_size);
+	if (slic_file
+	    && (slic_file->length > slic_size
+		|| slic_file->length < sizeof(acpi_header_t)
+		|| memcmp(slic_file->signature, "SLIC", 4) != 0)) {
+		slic_file = 0;
+	}
+
+	if (slic_file) {
+		memcpy(oem_id, slic_file->oem_id, 6);
+		memcpy(oem_table_id, slic_file->oem_table_id, 8);
+	} else {
+		memcpy(oem_id, OEM_ID, 6);
+		memcpy(oem_table_id, ACPI_TABLE_CREATOR, 8);
+	}
+
+	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start);
+
+	/* We need at least an RSDP and an RSDT Table */
+	rsdp = (acpi_rsdp_t *) current;
+	current += sizeof(acpi_rsdp_t);
+	current = acpi_align_current(current);
+	rsdt = (acpi_rsdt_t *) current;
+	current += sizeof(acpi_rsdt_t);
+	current = acpi_align_current(current);
+	xsdt = (acpi_xsdt_t *) current;
+	current += sizeof(acpi_xsdt_t);
+	current = acpi_align_current(current);
+
+	/* clear all table memory */
+	memset((void *) start, 0, current - start);
+
+	acpi_write_rsdp(rsdp, rsdt, xsdt, oem_id);
+	acpi_write_rsdt(rsdt, oem_id, oem_table_id);
+	acpi_write_xsdt(xsdt, oem_id, oem_table_id);
+
+	printk(BIOS_DEBUG, "ACPI:    * FACS\n");
+	current = ALIGN_UP(current, 64);
+	facs = (acpi_facs_t *) current;
+	current += sizeof(acpi_facs_t);
+	current = acpi_align_current(current);
+	acpi_create_facs(facs);
+
+	printk(BIOS_DEBUG, "ACPI:    * DSDT\n");
+	dsdt = (acpi_header_t *) current;
+	memcpy(dsdt, dsdt_file, sizeof(acpi_header_t));
+	if (dsdt->length >= sizeof(acpi_header_t)) {
+		current += sizeof(acpi_header_t);
+
+		acpigen_set_current((char *) current);
+		for (dev = all_devices; dev; dev = dev->next)
+			if (dev->ops && dev->ops->acpi_inject_dsdt)
+				dev->ops->acpi_inject_dsdt(dev);
+		current = (unsigned long) acpigen_get_current();
+		memcpy((char *)current,
+		       (char *)dsdt_file + sizeof(acpi_header_t),
+		       dsdt->length - sizeof(acpi_header_t));
+		current += dsdt->length - sizeof(acpi_header_t);
+
+		/* (Re)calculate length and checksum. */
+		dsdt->length = current - (unsigned long)dsdt;
+		dsdt->checksum = 0;
+		dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length);
+	}
+
+	current = acpi_align_current(current);
+
+	printk(BIOS_DEBUG, "ACPI:    * FADT\n");
+	fadt = (acpi_fadt_t *) current;
+	current += sizeof(acpi_fadt_t);
+	current = acpi_align_current(current);
+
+	acpi_create_fadt(fadt, facs, dsdt);
+	acpi_add_table(rsdp, fadt);
+
+	if (slic_file) {
+		printk(BIOS_DEBUG, "ACPI:     * SLIC\n");
+		slic = (acpi_header_t *)current;
+		memcpy(slic, slic_file, slic_file->length);
+		current += slic_file->length;
+		current = acpi_align_current(current);
+		acpi_add_table(rsdp, slic);
+	}
+
+	printk(BIOS_DEBUG, "ACPI:     * SSDT\n");
+	ssdt = (acpi_header_t *)current;
+	acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR);
+	if (ssdt->length > sizeof(acpi_header_t)) {
+		current += ssdt->length;
+		acpi_add_table(rsdp, ssdt);
+		current = acpi_align_current(current);
+	}
+
+	printk(BIOS_DEBUG, "ACPI:    * MCFG\n");
+	mcfg = (acpi_mcfg_t *) current;
+	acpi_create_mcfg(mcfg);
+	if (mcfg->header.length > sizeof(acpi_mcfg_t)) {
+		current += mcfg->header.length;
+		current = acpi_align_current(current);
+		acpi_add_table(rsdp, mcfg);
+	}
+
+	if (CONFIG(TPM1)) {
+		printk(BIOS_DEBUG, "ACPI:    * TCPA\n");
+		tcpa = (acpi_tcpa_t *) current;
+		acpi_create_tcpa(tcpa);
+		if (tcpa->header.length >= sizeof(acpi_tcpa_t)) {
+			current += tcpa->header.length;
+			current = acpi_align_current(current);
+			acpi_add_table(rsdp, tcpa);
+		}
+	}
+
+	if (CONFIG(TPM2)) {
+		printk(BIOS_DEBUG, "ACPI:    * TPM2\n");
+		tpm2 = (acpi_tpm2_t *) current;
+		acpi_create_tpm2(tpm2);
+		if (tpm2->header.length >= sizeof(acpi_tpm2_t)) {
+			current += tpm2->header.length;
+			current = acpi_align_current(current);
+			acpi_add_table(rsdp, tpm2);
+		}
+	}
+
+	printk(BIOS_DEBUG, "ACPI:    * MADT\n");
+
+	madt = (acpi_madt_t *) current;
+	acpi_create_madt(madt);
+	if (madt->header.length > sizeof(acpi_madt_t)) {
+		current += madt->header.length;
+		acpi_add_table(rsdp, madt);
+	}
+	current = acpi_align_current(current);
+
+	printk(BIOS_DEBUG, "current = %lx\n", current);
+
+	for (dev = all_devices; dev; dev = dev->next) {
+		if (dev->ops && dev->ops->write_acpi_tables) {
+			current = dev->ops->write_acpi_tables(dev, current,
+				rsdp);
+			current = acpi_align_current(current);
+		}
+	}
+
+	printk(BIOS_INFO, "ACPI: done.\n");
+	return current;
+}
+
+static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp)
+{
+	if (strncmp((char *)rsdp, RSDP_SIG, sizeof(RSDP_SIG) - 1) != 0)
+		return NULL;
+
+	printk(BIOS_DEBUG, "Looking on %p for valid checksum\n", rsdp);
+
+	if (acpi_checksum((void *)rsdp, 20) != 0)
+		return NULL;
+	printk(BIOS_DEBUG, "Checksum 1 passed\n");
+
+	if ((rsdp->revision > 1) && (acpi_checksum((void *)rsdp,
+						rsdp->length) != 0))
+		return NULL;
+	printk(BIOS_DEBUG, "Checksum 2 passed all OK\n");
+
+	return rsdp;
+}
+
+void *acpi_find_wakeup_vector(void)
+{
+	char *p, *end;
+	acpi_rsdt_t *rsdt;
+	acpi_facs_t *facs;
+	acpi_fadt_t *fadt = NULL;
+	acpi_rsdp_t *rsdp = NULL;
+	void *wake_vec;
+	int i;
+
+	if (!acpi_is_wakeup())
+		return NULL;
+
+	printk(BIOS_DEBUG, "Trying to find the wakeup vector...\n");
+
+	/* Find RSDP. */
+	for (p = (char *)0xe0000; p < (char *)0xfffff; p += 16) {
+		rsdp = valid_rsdp((acpi_rsdp_t *)p);
+		if (rsdp)
+			break;
+	}
+
+	if (rsdp == NULL) {
+		printk(BIOS_ALERT,
+		       "No RSDP found, wake up from S3 not possible.\n");
+		return NULL;
+	}
+
+	printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
+	rsdt = (acpi_rsdt_t *)(uintptr_t)rsdp->rsdt_address;
+
+	end = (char *)rsdt + rsdt->header.length;
+	printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);
+
+	for (i = 0; ((char *)&rsdt->entry[i]) < end; i++) {
+		fadt = (acpi_fadt_t *)(uintptr_t)rsdt->entry[i];
+		if (strncmp((char *)fadt, "FACP", 4) == 0)
+			break;
+		fadt = NULL;
+	}
+
+	if (fadt == NULL) {
+		printk(BIOS_ALERT,
+		       "No FADT found, wake up from S3 not possible.\n");
+		return NULL;
+	}
+
+	printk(BIOS_DEBUG, "FADT found at %p\n", fadt);
+	facs = (acpi_facs_t *)(uintptr_t)fadt->firmware_ctrl;
+
+	if (facs == NULL) {
+		printk(BIOS_ALERT,
+		       "No FACS found, wake up from S3 not possible.\n");
+		return NULL;
+	}
+
+	printk(BIOS_DEBUG, "FACS found at %p\n", facs);
+	wake_vec = (void *)(uintptr_t)facs->firmware_waking_vector;
+	printk(BIOS_DEBUG, "OS waking vector is %p\n", wake_vec);
+
+	return wake_vec;
+}
+
+__weak int acpi_get_gpe(int gpe)
+{
+	return -1; /* implemented by SOC */
+}
+
+int get_acpi_table_revision(enum acpi_tables table)
+{
+	switch (table) {
+	case FADT:
+		return ACPI_FADT_REV_ACPI_6_0;
+	case MADT: /* ACPI 3.0: 2, ACPI 4.0/5.0: 3, ACPI 6.2b/6.3: 5 */
+		return 3;
+	case MCFG:
+		return 1;
+	case TCPA:
+		return 2;
+	case TPM2:
+		return 4;
+	case SSDT: /* ACPI 3.0 upto 6.3: 2 */
+		return 2;
+	case SRAT: /* ACPI 2.0: 1, ACPI 3.0: 2, ACPI 4.0 upto 6.3: 3 */
+		return 1; /* TODO Should probably be upgraded to 2 */
+	case DMAR:
+		return 1;
+	case SLIT: /* ACPI 2.0 upto 6.3: 1 */
+		return 1;
+	case SPMI: /* IMPI 2.0 */
+		return 5;
+	case HPET: /* Currently 1. Table added in ACPI 2.0. */
+		return 1;
+	case VFCT: /* ACPI 2.0/3.0/4.0: 1 */
+		return 1;
+	case IVRS:
+		return IVRS_FORMAT_FIXED;
+	case DBG2:
+		return 0;
+	case FACS: /* ACPI 2.0/3.0: 1, ACPI 4.0 upto 6.3: 2 */
+		return 1;
+	case RSDT: /* ACPI 1.0 upto 6.3: 1 */
+		return 1;
+	case XSDT: /* ACPI 2.0 upto 6.3: 1 */
+		return 1;
+	case RSDP: /* ACPI 2.0 upto 6.3: 2 */
+		return 2;
+	case HEST:
+		return 1;
+	case NHLT:
+		return 5;
+	case BERT:
+		return 1;
+	default:
+		return -1;
+	}
+	return -1;
+}
diff --git a/src/acpi/acpi_device.c b/src/acpi/acpi_device.c
new file mode 100644
index 0000000000..9f63200121
--- /dev/null
+++ b/src/acpi/acpi_device.c
@@ -0,0 +1,961 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <assert.h>
+#include <string.h>
+#include <arch/acpi.h>
+#include <arch/acpi_device.h>
+#include <arch/acpigen.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <stdlib.h>
+#include <crc_byte.h>
+
+#if CONFIG(GENERIC_GPIO_LIB)
+#include <gpio.h>
+#endif
+
+#define ACPI_DP_UUID		"daffd814-6eba-4d8c-8a91-bc9bbf4aa301"
+#define ACPI_DP_CHILD_UUID	"dbb8e3e6-5886-4ba6-8795-1319f52a966b"
+
+/* Write empty word value and return pointer to it */
+static void *acpi_device_write_zero_len(void)
+{
+	char *p = acpigen_get_current();
+	acpigen_emit_word(0);
+	return p;
+}
+
+/* Fill in length value from start to current at specified location */
+static void acpi_device_fill_from_len(char *ptr, char *start)
+{
+	uint16_t len = acpigen_get_current() - start;
+	ptr[0] = len & 0xff;
+	ptr[1] = (len >> 8) & 0xff;
+}
+
+/*
+ * Fill in the length field with the value calculated from after
+ * the 16bit field to acpigen current as this length value does
+ * not include the length field itself.
+ */
+static void acpi_device_fill_len(void *ptr)
+{
+	acpi_device_fill_from_len(ptr, ptr + sizeof(uint16_t));
+}
+
+/* Locate and return the ACPI name for this device */
+const char *acpi_device_name(const struct device *dev)
+{
+	const struct device *pdev = dev;
+	const char *name = NULL;
+
+	if (!dev)
+		return NULL;
+
+	/* Check for device specific handler */
+	if (dev->ops->acpi_name)
+		return dev->ops->acpi_name(dev);
+
+	/* Walk up the tree to find if any parent can identify this device */
+	while (pdev->bus) {
+		pdev = pdev->bus->dev;
+		if (!pdev)
+			break;
+		if (pdev->path.type == DEVICE_PATH_ROOT)
+			break;
+		if (pdev->ops && pdev->ops->acpi_name)
+			name = pdev->ops->acpi_name(dev);
+		if (name)
+			return name;
+	}
+
+	return NULL;
+}
+
+/* Locate and return the ACPI _HID (Hardware ID) for this device */
+const char *acpi_device_hid(const struct device *dev)
+{
+	if (!dev)
+		return NULL;
+
+	/* Check for device specific handler */
+	if (dev->ops->acpi_hid)
+		return dev->ops->acpi_hid(dev);
+
+	/*
+	 * Don't walk up the tree to find any parent that can identify this device, as
+	 * PNP devices are hard to identify.
+	 */
+
+	return NULL;
+}
+
+/*
+ * Generate unique ID based on the ACPI path.
+ * Collisions on the same _HID are possible but very unlikely.
+ */
+uint32_t acpi_device_uid(const struct device *dev)
+{
+	const char *path = acpi_device_path(dev);
+	if (!path)
+		return 0;
+
+	return CRC(path, strlen(path), crc32_byte);
+}
+
+/* Recursive function to find the root device and print a path from there */
+static ssize_t acpi_device_path_fill(const struct device *dev, char *buf,
+				     size_t buf_len, size_t cur)
+{
+	const char *name = acpi_device_name(dev);
+	ssize_t next = 0;
+
+	if (!name)
+		return -1;
+
+	/*
+	 * Make sure this name segment will fit, including the path segment
+	 * separator and possible NUL terminator if this is the last segment.
+	 */
+	if (!dev || (cur + strlen(name) + 2) > buf_len)
+		return cur;
+
+	/* Walk up the tree to the root device */
+	if (dev->path.type != DEVICE_PATH_ROOT && dev->bus && dev->bus->dev)
+		next = acpi_device_path_fill(dev->bus->dev, buf, buf_len, cur);
+	if (next < 0)
+		return next;
+
+	/* Fill in the path from the root device */
+	next += snprintf(buf + next, buf_len - next, "%s%s",
+			 (dev->path.type == DEVICE_PATH_ROOT
+				|| (strlen(name) == 0)) ?
+					"" : ".", name);
+
+	return next;
+}
+
+/*
+ * Warning: just as with dev_path() this uses a static buffer
+ * so should not be called mulitple times in one statement
+ */
+const char *acpi_device_path(const struct device *dev)
+{
+	static char buf[DEVICE_PATH_MAX] = {};
+
+	if (!dev)
+		return NULL;
+
+	if (acpi_device_path_fill(dev, buf, sizeof(buf), 0) <= 0)
+		return NULL;
+
+	return buf;
+}
+
+/* Return the path of the parent device as the ACPI Scope for this device */
+const char *acpi_device_scope(const struct device *dev)
+{
+	static char buf[DEVICE_PATH_MAX] = {};
+
+	if (!dev || !dev->bus || !dev->bus->dev)
+		return NULL;
+
+	if (acpi_device_path_fill(dev->bus->dev, buf, sizeof(buf), 0) <= 0)
+		return NULL;
+
+	return buf;
+}
+
+/* Concatenate the device path and provided name suffix */
+const char *acpi_device_path_join(const struct device *dev, const char *name)
+{
+	static char buf[DEVICE_PATH_MAX] = {};
+	ssize_t len;
+
+	if (!dev)
+		return NULL;
+
+	/* Build the path of this device */
+	len = acpi_device_path_fill(dev, buf, sizeof(buf), 0);
+	if (len <= 0)
+		return NULL;
+
+	/* Ensure there is room for the added name, separator, and NUL */
+	if ((len + strlen(name) + 2) > sizeof(buf))
+		return NULL;
+	snprintf(buf + len, sizeof(buf) - len, ".%s", name);
+
+	return buf;
+}
+
+int acpi_device_status(const struct device *dev)
+{
+	if (!dev->enabled)
+		return ACPI_STATUS_DEVICE_ALL_OFF;
+	if (dev->hidden)
+		return ACPI_STATUS_DEVICE_HIDDEN_ON;
+	return ACPI_STATUS_DEVICE_ALL_ON;
+}
+
+
+/* Write the unique _UID based on ACPI device path. */
+void acpi_device_write_uid(const struct device *dev)
+{
+	acpigen_write_name_integer("_UID", acpi_device_uid(dev));
+}
+
+/* ACPI 6.1 section 6.4.3.6: Extended Interrupt Descriptor */
+void acpi_device_write_interrupt(const struct acpi_irq *irq)
+{
+	void *desc_length;
+	uint8_t flags;
+
+	if (!irq || !irq->pin)
+		return;
+
+	/* This is supported by GpioInt() but not Interrupt() */
+	if (irq->polarity == ACPI_IRQ_ACTIVE_BOTH)
+		return;
+
+	/* Byte 0: Descriptor Type */
+	acpigen_emit_byte(ACPI_DESCRIPTOR_INTERRUPT);
+
+	/* Byte 1-2: Length (filled in later) */
+	desc_length = acpi_device_write_zero_len();
+
+	/*
+	 * Byte 3: Flags
+	 *  [7:5]: Reserved
+	 *    [4]: Wake     (0=NO_WAKE   1=WAKE)
+	 *    [3]: Sharing  (0=EXCLUSIVE 1=SHARED)
+	 *    [2]: Polarity (0=HIGH      1=LOW)
+	 *    [1]: Mode     (0=LEVEL     1=EDGE)
+	 *    [0]: Resource (0=PRODUCER  1=CONSUMER)
+	 */
+	flags = 1 << 0; /* ResourceConsumer */
+	if (irq->mode == ACPI_IRQ_EDGE_TRIGGERED)
+		flags |= 1 << 1;
+	if (irq->polarity == ACPI_IRQ_ACTIVE_LOW)
+		flags |= 1 << 2;
+	if (irq->shared == ACPI_IRQ_SHARED)
+		flags |= 1 << 3;
+	if (irq->wake == ACPI_IRQ_WAKE)
+		flags |= 1 << 4;
+	acpigen_emit_byte(flags);
+
+	/* Byte 4: Interrupt Table Entry Count */
+	acpigen_emit_byte(1);
+
+	/* Byte 5-8: Interrupt Number */
+	acpigen_emit_dword(irq->pin);
+
+	/* Fill in Descriptor Length (account for len word) */
+	acpi_device_fill_len(desc_length);
+}
+
+/* ACPI 6.1 section 6.4.3.8.1 - GPIO Interrupt or I/O */
+void acpi_device_write_gpio(const struct acpi_gpio *gpio)
+{
+	void *start, *desc_length;
+	void *pin_table_offset, *vendor_data_offset, *resource_offset;
+	uint16_t flags = 0;
+	int pin;
+
+	if (!gpio || gpio->type > ACPI_GPIO_TYPE_IO)
+		return;
+
+	start = acpigen_get_current();
+
+	/* Byte 0: Descriptor Type */
+	acpigen_emit_byte(ACPI_DESCRIPTOR_GPIO);
+
+	/* Byte 1-2: Length (fill in later) */
+	desc_length = acpi_device_write_zero_len();
+
+	/* Byte 3: Revision ID */
+	acpigen_emit_byte(ACPI_GPIO_REVISION_ID);
+
+	/* Byte 4: GpioIo or GpioInt */
+	acpigen_emit_byte(gpio->type);
+
+	/*
+	 * Byte 5-6: General Flags
+	 *   [15:1]: 0 => Reserved
+	 *      [0]: 1 => ResourceConsumer
+	 */
+	acpigen_emit_word(1 << 0);
+
+	switch (gpio->type) {
+	case ACPI_GPIO_TYPE_INTERRUPT:
+		/*
+		 * Byte 7-8: GPIO Interrupt Flags
+		 *   [15:5]: 0 => Reserved
+		 *      [4]: Wake     (0=NO_WAKE   1=WAKE)
+		 *      [3]: Sharing  (0=EXCLUSIVE 1=SHARED)
+		 *    [2:1]: Polarity (0=HIGH      1=LOW     2=BOTH)
+		 *      [0]: Mode     (0=LEVEL     1=EDGE)
+		 */
+		if (gpio->irq.mode == ACPI_IRQ_EDGE_TRIGGERED)
+			flags |= 1 << 0;
+		if (gpio->irq.shared == ACPI_IRQ_SHARED)
+			flags |= 1 << 3;
+		if (gpio->irq.wake == ACPI_IRQ_WAKE)
+			flags |= 1 << 4;
+
+		switch (gpio->irq.polarity) {
+		case ACPI_IRQ_ACTIVE_HIGH:
+			flags |= 0 << 1;
+			break;
+		case ACPI_IRQ_ACTIVE_LOW:
+			flags |= 1 << 1;
+			break;
+		case ACPI_IRQ_ACTIVE_BOTH:
+			flags |= 2 << 1;
+			break;
+		}
+		break;
+
+	case ACPI_GPIO_TYPE_IO:
+		/*
+		 * Byte 7-8: GPIO IO Flags
+		 *   [15:4]: 0 => Reserved
+		 *      [3]: Sharing  (0=EXCLUSIVE 1=SHARED)
+		 *      [2]: 0 => Reserved
+		 *    [1:0]: IO Restriction
+		 *           0 => IoRestrictionNone
+		 *           1 => IoRestrictionInputOnly
+		 *           2 => IoRestrictionOutputOnly
+		 *           3 => IoRestrictionNoneAndPreserve
+		 */
+		flags |= gpio->io_restrict & 3;
+		if (gpio->io_shared)
+			flags |= 1 << 3;
+		break;
+	}
+	acpigen_emit_word(flags);
+
+	/*
+	 * Byte 9: Pin Configuration
+	 *  0x01 => Default (no configuration applied)
+	 *  0x02 => Pull-up
+	 *  0x03 => Pull-down
+	 *  0x04-0x7F => Reserved
+	 *  0x80-0xff => Vendor defined
+	 */
+	acpigen_emit_byte(gpio->pull);
+
+	/* Byte 10-11: Output Drive Strength in 1/100 mA */
+	acpigen_emit_word(gpio->output_drive_strength);
+
+	/* Byte 12-13: Debounce Timeout in 1/100 ms */
+	acpigen_emit_word(gpio->interrupt_debounce_timeout);
+
+	/* Byte 14-15: Pin Table Offset, relative to start */
+	pin_table_offset = acpi_device_write_zero_len();
+
+	/* Byte 16: Reserved */
+	acpigen_emit_byte(0);
+
+	/* Byte 17-18: Resource Source Name Offset, relative to start */
+	resource_offset = acpi_device_write_zero_len();
+
+	/* Byte 19-20: Vendor Data Offset, relative to start */
+	vendor_data_offset = acpi_device_write_zero_len();
+
+	/* Byte 21-22: Vendor Data Length */
+	acpigen_emit_word(0);
+
+	/* Fill in Pin Table Offset */
+	acpi_device_fill_from_len(pin_table_offset, start);
+
+	/* Pin Table, one word for each pin */
+	for (pin = 0; pin < gpio->pin_count; pin++) {
+		uint16_t acpi_pin = gpio->pins[pin];
+#if CONFIG(GENERIC_GPIO_LIB)
+		acpi_pin = gpio_acpi_pin(acpi_pin);
+#endif
+		acpigen_emit_word(acpi_pin);
+	}
+
+	/* Fill in Resource Source Name Offset */
+	acpi_device_fill_from_len(resource_offset, start);
+
+	/* Resource Source Name String */
+#if CONFIG(GENERIC_GPIO_LIB)
+	acpigen_emit_string(gpio->resource ? : gpio_acpi_path(gpio->pins[0]));
+#else
+	acpigen_emit_string(gpio->resource);
+#endif
+
+	/* Fill in Vendor Data Offset */
+	acpi_device_fill_from_len(vendor_data_offset, start);
+
+	/* Fill in GPIO Descriptor Length (account for len word) */
+	acpi_device_fill_len(desc_length);
+}
+
+/* ACPI 6.1 section 6.4.3.8.2.1 - I2cSerialBus() */
+void acpi_device_write_i2c(const struct acpi_i2c *i2c)
+{
+	void *desc_length, *type_length;
+
+	/* Byte 0: Descriptor Type */
+	acpigen_emit_byte(ACPI_DESCRIPTOR_SERIAL_BUS);
+
+	/* Byte 1+2: Length (filled in later) */
+	desc_length = acpi_device_write_zero_len();
+
+	/* Byte 3: Revision ID */
+	acpigen_emit_byte(ACPI_I2C_SERIAL_BUS_REVISION_ID);
+
+	/* Byte 4: Resource Source Index is Reserved */
+	acpigen_emit_byte(0);
+
+	/* Byte 5: Serial Bus Type is I2C */
+	acpigen_emit_byte(ACPI_SERIAL_BUS_TYPE_I2C);
+
+	/*
+	 * Byte 6: Flags
+	 *  [7:2]: 0 => Reserved
+	 *    [1]: 1 => ResourceConsumer
+	 *    [0]: 0 => ControllerInitiated
+	 */
+	acpigen_emit_byte(1 << 1);
+
+	/*
+	 * Byte 7-8: Type Specific Flags
+	 *   [15:1]: 0 => Reserved
+	 *      [0]: 0 => 7bit, 1 => 10bit
+	 */
+	acpigen_emit_word(i2c->mode_10bit);
+
+	/* Byte 9: Type Specific Revision ID */
+	acpigen_emit_byte(ACPI_I2C_TYPE_SPECIFIC_REVISION_ID);
+
+	/* Byte 10-11: I2C Type Data Length */
+	type_length = acpi_device_write_zero_len();
+
+	/* Byte 12-15: I2C Bus Speed */
+	acpigen_emit_dword(i2c->speed);
+
+	/* Byte 16-17: I2C Slave Address */
+	acpigen_emit_word(i2c->address);
+
+	/* Fill in Type Data Length */
+	acpi_device_fill_len(type_length);
+
+	/* Byte 18+: ResourceSource */
+	acpigen_emit_string(i2c->resource);
+
+	/* Fill in I2C Descriptor Length */
+	acpi_device_fill_len(desc_length);
+}
+
+/* ACPI 6.1 section 6.4.3.8.2.2 - SpiSerialBus() */
+void acpi_device_write_spi(const struct acpi_spi *spi)
+{
+	void *desc_length, *type_length;
+	uint16_t flags = 0;
+
+	/* Byte 0: Descriptor Type */
+	acpigen_emit_byte(ACPI_DESCRIPTOR_SERIAL_BUS);
+
+	/* Byte 1+2: Length (filled in later) */
+	desc_length = acpi_device_write_zero_len();
+
+	/* Byte 3: Revision ID */
+	acpigen_emit_byte(ACPI_SPI_SERIAL_BUS_REVISION_ID);
+
+	/* Byte 4: Resource Source Index is Reserved */
+	acpigen_emit_byte(0);
+
+	/* Byte 5: Serial Bus Type is SPI */
+	acpigen_emit_byte(ACPI_SERIAL_BUS_TYPE_SPI);
+
+	/*
+	 * Byte 6: Flags
+	 *  [7:2]: 0 => Reserved
+	 *    [1]: 1 => ResourceConsumer
+	 *    [0]: 0 => ControllerInitiated
+	 */
+	acpigen_emit_byte(1 << 1);
+
+	/*
+	 * Byte 7-8: Type Specific Flags
+	 *   [15:2]: 0 => Reserved
+	 *      [1]: 0 => ActiveLow, 1 => ActiveHigh
+	 *      [0]: 0 => FourWire, 1 => ThreeWire
+	 */
+	if (spi->wire_mode == SPI_3_WIRE_MODE)
+		flags |= 1 << 0;
+	if (spi->device_select_polarity == SPI_POLARITY_HIGH)
+		flags |= 1 << 1;
+	acpigen_emit_word(flags);
+
+	/* Byte 9: Type Specific Revision ID */
+	acpigen_emit_byte(ACPI_SPI_TYPE_SPECIFIC_REVISION_ID);
+
+	/* Byte 10-11: SPI Type Data Length */
+	type_length = acpi_device_write_zero_len();
+
+	/* Byte 12-15: Connection Speed */
+	acpigen_emit_dword(spi->speed);
+
+	/* Byte 16: Data Bit Length */
+	acpigen_emit_byte(spi->data_bit_length);
+
+	/* Byte 17: Clock Phase */
+	acpigen_emit_byte(spi->clock_phase);
+
+	/* Byte 18: Clock Polarity */
+	acpigen_emit_byte(spi->clock_polarity);
+
+	/* Byte 19-20: Device Selection */
+	acpigen_emit_word(spi->device_select);
+
+	/* Fill in Type Data Length */
+	acpi_device_fill_len(type_length);
+
+	/* Byte 21+: ResourceSource String */
+	acpigen_emit_string(spi->resource);
+
+	/* Fill in SPI Descriptor Length */
+	acpi_device_fill_len(desc_length);
+}
+
+/* PowerResource() with Enable and/or Reset control */
+void acpi_device_add_power_res(const struct acpi_power_res_params *params)
+{
+	static const char * const power_res_dev_states[] = { "_PR0", "_PR3" };
+	unsigned int reset_gpio = params->reset_gpio ? params->reset_gpio->pins[0] : 0;
+	unsigned int enable_gpio = params->enable_gpio ? params->enable_gpio->pins[0] : 0;
+	unsigned int stop_gpio = params->stop_gpio ? params->stop_gpio->pins[0] : 0;
+
+	if (!reset_gpio && !enable_gpio && !stop_gpio)
+		return;
+
+	/* PowerResource (PRIC, 0, 0) */
+	acpigen_write_power_res("PRIC", 0, 0, power_res_dev_states,
+				ARRAY_SIZE(power_res_dev_states));
+
+	/* Method (_STA, 0, NotSerialized) { Return (0x1) } */
+	acpigen_write_STA(0x1);
+
+	/* Method (_ON, 0, Serialized) */
+	acpigen_write_method_serialized("_ON", 0);
+	if (reset_gpio)
+		acpigen_enable_tx_gpio(params->reset_gpio);
+	if (enable_gpio) {
+		acpigen_enable_tx_gpio(params->enable_gpio);
+		if (params->enable_delay_ms)
+			acpigen_write_sleep(params->enable_delay_ms);
+	}
+	if (reset_gpio) {
+		acpigen_disable_tx_gpio(params->reset_gpio);
+		if (params->reset_delay_ms)
+			acpigen_write_sleep(params->reset_delay_ms);
+	}
+	if (stop_gpio) {
+		acpigen_disable_tx_gpio(params->stop_gpio);
+		if (params->stop_delay_ms)
+			acpigen_write_sleep(params->stop_delay_ms);
+	}
+	acpigen_pop_len();		/* _ON method */
+
+	/* Method (_OFF, 0, Serialized) */
+	acpigen_write_method_serialized("_OFF", 0);
+	if (stop_gpio) {
+		acpigen_enable_tx_gpio(params->stop_gpio);
+		if (params->stop_off_delay_ms)
+			acpigen_write_sleep(params->stop_off_delay_ms);
+	}
+	if (reset_gpio) {
+		acpigen_enable_tx_gpio(params->reset_gpio);
+		if (params->reset_off_delay_ms)
+			acpigen_write_sleep(params->reset_off_delay_ms);
+	}
+	if (enable_gpio) {
+		acpigen_disable_tx_gpio(params->enable_gpio);
+		if (params->enable_off_delay_ms)
+			acpigen_write_sleep(params->enable_off_delay_ms);
+	}
+	acpigen_pop_len();		/* _OFF method */
+
+	acpigen_pop_len();		/* PowerResource PRIC */
+}
+
+static void acpi_dp_write_array(const struct acpi_dp *array);
+static void acpi_dp_write_value(const struct acpi_dp *prop)
+{
+	switch (prop->type) {
+	case ACPI_DP_TYPE_INTEGER:
+		acpigen_write_integer(prop->integer);
+		break;
+	case ACPI_DP_TYPE_STRING:
+	case ACPI_DP_TYPE_CHILD:
+		acpigen_write_string(prop->string);
+		break;
+	case ACPI_DP_TYPE_REFERENCE:
+		acpigen_emit_namestring(prop->string);
+		break;
+	case ACPI_DP_TYPE_ARRAY:
+		acpi_dp_write_array(prop->array);
+		break;
+	default:
+		break;
+	}
+}
+
+/* Package (2) { "prop->name", VALUE } */
+static void acpi_dp_write_property(const struct acpi_dp *prop)
+{
+	acpigen_write_package(2);
+	acpigen_write_string(prop->name);
+	acpi_dp_write_value(prop);
+	acpigen_pop_len();
+}
+
+/* Write array of Device Properties */
+static void acpi_dp_write_array(const struct acpi_dp *array)
+{
+	const struct acpi_dp *dp;
+	char *pkg_count;
+
+	/* Package element count determined as it is populated */
+	pkg_count = acpigen_write_package(0);
+
+	/*
+	 * Only acpi_dp of type DP_TYPE_TABLE is allowed to be an array.
+	 * DP_TYPE_TABLE does not have a value to be written. Thus, start
+	 * the loop from next type in the array.
+	 */
+	for (dp = array->next; dp; dp = dp->next) {
+		acpi_dp_write_value(dp);
+		(*pkg_count)++;
+	}
+
+	acpigen_pop_len();
+}
+
+static void acpi_dp_free(struct acpi_dp *dp)
+{
+	while (dp) {
+		struct acpi_dp *p = dp->next;
+
+		switch (dp->type) {
+		case ACPI_DP_TYPE_CHILD:
+			acpi_dp_free(dp->child);
+			break;
+		case ACPI_DP_TYPE_ARRAY:
+			acpi_dp_free(dp->array);
+			break;
+		default:
+			break;
+		}
+
+		free(dp);
+		dp = p;
+	}
+}
+
+void acpi_dp_write(struct acpi_dp *table)
+{
+	struct acpi_dp *dp, *prop;
+	char *dp_count, *prop_count = NULL;
+	int child_count = 0;
+
+	if (!table || table->type != ACPI_DP_TYPE_TABLE || !table->next)
+		return;
+
+	/* Name (name) */
+	acpigen_write_name(table->name);
+
+	/* Device Property list starts with the next entry */
+	prop = table->next;
+
+	/* Package (DP), default to assuming no properties or children */
+	dp_count = acpigen_write_package(0);
+
+	/* Print base properties */
+	for (dp = prop; dp; dp = dp->next) {
+		if (dp->type == ACPI_DP_TYPE_CHILD) {
+			child_count++;
+		} else {
+			/*
+			 * The UUID and package is only added when
+			 * we come across the first property.  This
+			 * is to avoid creating a zero-length package
+			 * in situations where there are only children.
+			 */
+			if (!prop_count) {
+				*dp_count += 2;
+				/* ToUUID (ACPI_DP_UUID) */
+				acpigen_write_uuid(ACPI_DP_UUID);
+				/*
+				 * Package (PROP), element count determined as
+				 * it is populated
+				 */
+				prop_count = acpigen_write_package(0);
+			}
+			(*prop_count)++;
+			acpi_dp_write_property(dp);
+		}
+	}
+	if (prop_count) {
+		/* Package (PROP) length, if a package was written */
+		acpigen_pop_len();
+	}
+
+	if (child_count) {
+		/* Update DP package count to 2 or 4 */
+		*dp_count += 2;
+		/* ToUUID (ACPI_DP_CHILD_UUID) */
+		acpigen_write_uuid(ACPI_DP_CHILD_UUID);
+
+		/* Print child pointer properties */
+		acpigen_write_package(child_count);
+
+		for (dp = prop; dp; dp = dp->next)
+			if (dp->type == ACPI_DP_TYPE_CHILD)
+				acpi_dp_write_property(dp);
+		/* Package (CHILD) length */
+		acpigen_pop_len();
+	}
+
+	/* Package (DP) length */
+	acpigen_pop_len();
+
+	/* Recursively parse children into separate tables */
+	for (dp = prop; dp; dp = dp->next)
+		if (dp->type == ACPI_DP_TYPE_CHILD)
+			acpi_dp_write(dp->child);
+
+	/* Clean up */
+	acpi_dp_free(table);
+}
+
+static struct acpi_dp *acpi_dp_new(struct acpi_dp *dp, enum acpi_dp_type type,
+				   const char *name)
+{
+	struct acpi_dp *new;
+
+	new = malloc(sizeof(struct acpi_dp));
+	if (!new)
+		return NULL;
+
+	memset(new, 0, sizeof(*new));
+	new->type = type;
+	new->name = name;
+
+	if (dp) {
+		/* Add to end of property list */
+		while (dp->next)
+			dp = dp->next;
+		dp->next = new;
+	}
+
+	return new;
+}
+
+struct acpi_dp *acpi_dp_new_table(const char *name)
+{
+	return acpi_dp_new(NULL, ACPI_DP_TYPE_TABLE, name);
+}
+
+size_t acpi_dp_add_property_list(struct acpi_dp *dp,
+				 const struct acpi_dp *property_list,
+				 size_t property_count)
+{
+	const struct acpi_dp *prop;
+	size_t i, properties_added = 0;
+
+	if (!dp || !property_list)
+		return 0;
+
+	for (i = 0; i < property_count; i++) {
+		prop = &property_list[i];
+
+		if (prop->type == ACPI_DP_TYPE_UNKNOWN || !prop->name)
+			continue;
+
+		switch (prop->type) {
+		case ACPI_DP_TYPE_INTEGER:
+			acpi_dp_add_integer(dp, prop->name, prop->integer);
+			break;
+		case ACPI_DP_TYPE_STRING:
+			acpi_dp_add_string(dp, prop->name, prop->string);
+			break;
+		case ACPI_DP_TYPE_REFERENCE:
+			acpi_dp_add_reference(dp, prop->name, prop->string);
+			break;
+		case ACPI_DP_TYPE_ARRAY:
+			acpi_dp_add_array(dp, prop->array);
+			break;
+		case ACPI_DP_TYPE_CHILD:
+			acpi_dp_add_child(dp, prop->name, prop->child);
+			break;
+		default:
+			continue;
+		}
+
+		++properties_added;
+	}
+
+	return properties_added;
+}
+
+struct acpi_dp *acpi_dp_add_integer(struct acpi_dp *dp, const char *name,
+				    uint64_t value)
+{
+	if (!dp)
+		return NULL;
+
+	struct acpi_dp *new = acpi_dp_new(dp, ACPI_DP_TYPE_INTEGER, name);
+
+	if (new)
+		new->integer = value;
+
+	return new;
+}
+
+struct acpi_dp *acpi_dp_add_string(struct acpi_dp *dp, const char *name,
+				   const char *string)
+{
+	if (!dp)
+		return NULL;
+
+	struct acpi_dp *new = acpi_dp_new(dp, ACPI_DP_TYPE_STRING, name);
+
+	if (new)
+		new->string = string;
+
+	return new;
+}
+
+struct acpi_dp *acpi_dp_add_reference(struct acpi_dp *dp, const char *name,
+				      const char *reference)
+{
+	if (!dp)
+		return NULL;
+
+	struct acpi_dp *new = acpi_dp_new(dp, ACPI_DP_TYPE_REFERENCE, name);
+
+	if (new)
+		new->string = reference;
+
+	return new;
+}
+
+struct acpi_dp *acpi_dp_add_child(struct acpi_dp *dp, const char *name,
+				  struct acpi_dp *child)
+{
+	struct acpi_dp *new;
+
+	if (!dp || !child || child->type != ACPI_DP_TYPE_TABLE)
+		return NULL;
+
+	new = acpi_dp_new(dp, ACPI_DP_TYPE_CHILD, name);
+	if (new) {
+		new->child = child;
+		new->string = child->name;
+	}
+
+	return new;
+}
+
+struct acpi_dp *acpi_dp_add_array(struct acpi_dp *dp, struct acpi_dp *array)
+{
+	struct acpi_dp *new;
+
+	if (!dp || !array || array->type != ACPI_DP_TYPE_TABLE)
+		return NULL;
+
+	new = acpi_dp_new(dp, ACPI_DP_TYPE_ARRAY, array->name);
+	if (new)
+		new->array = array;
+
+	return new;
+}
+
+struct acpi_dp *acpi_dp_add_integer_array(struct acpi_dp *dp, const char *name,
+					  const uint64_t *array, int len)
+{
+	struct acpi_dp *dp_array;
+	int i;
+
+	if (!dp || len <= 0)
+		return NULL;
+
+	dp_array = acpi_dp_new_table(name);
+	if (!dp_array)
+		return NULL;
+
+	for (i = 0; i < len; i++)
+		if (!acpi_dp_add_integer(dp_array, NULL, array[i]))
+			break;
+
+	acpi_dp_add_array(dp, dp_array);
+
+	return dp_array;
+}
+
+struct acpi_dp *acpi_dp_add_gpio(struct acpi_dp *dp, const char *name,
+				 const char *ref, int index, int pin,
+				 int active_low)
+{
+	if (!dp)
+		return NULL;
+
+	struct acpi_dp *gpio = acpi_dp_new_table(name);
+
+	if (!gpio)
+		return NULL;
+
+	/* The device that has _CRS containing GpioIO()/GpioInt() */
+	acpi_dp_add_reference(gpio, NULL, ref);
+
+	/* Index of the GPIO resource in _CRS starting from zero */
+	acpi_dp_add_integer(gpio, NULL, index);
+
+	/* Pin in the GPIO resource, typically zero */
+	acpi_dp_add_integer(gpio, NULL, pin);
+
+	/* Set if pin is active low */
+	acpi_dp_add_integer(gpio, NULL, active_low);
+
+	acpi_dp_add_array(dp, gpio);
+
+	return gpio;
+}
+
+/*
+ * This function writes a PCI device with _ADR object:
+ * Example:
+ * Scope (\_SB.PCI0)
+ * {
+ *    Device (IGFX)
+ *    {
+ *       Name (_ADR, 0x0000000000000000)
+ *       Method (_STA, 0, NotSerialized) { Return (status) }
+ *    }
+ * }
+ */
+void acpi_device_write_pci_dev(const struct device *dev)
+{
+	const char *scope = acpi_device_scope(dev);
+	const char *name = acpi_device_name(dev);
+
+	assert(dev->path.type == DEVICE_PATH_PCI);
+	assert(name);
+	assert(scope);
+
+	acpigen_write_scope(scope);
+	acpigen_write_device(name);
+
+	acpigen_write_ADR_pci_device(dev);
+	acpigen_write_STA(acpi_device_status(dev));
+
+	acpigen_pop_len(); /* Device */
+	acpigen_pop_len(); /* Scope */
+}
diff --git a/src/acpi/acpi_pld.c b/src/acpi/acpi_pld.c
new file mode 100644
index 0000000000..135009a243
--- /dev/null
+++ b/src/acpi/acpi_pld.c
@@ -0,0 +1,160 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <stdint.h>
+#include <string.h>
+#include <arch/acpi.h>
+#include <arch/acpi_pld.h>
+
+int acpi_pld_fill_usb(struct acpi_pld *pld, enum acpi_upc_type type,
+		      struct acpi_pld_group *group)
+{
+	if (!pld)
+		return -1;
+
+	memset(pld, 0, sizeof(struct acpi_pld));
+
+	/* Set defaults */
+	pld->ignore_color = 1;
+	pld->panel = PLD_PANEL_UNKNOWN;
+	pld->vertical_position = PLD_VERTICAL_POSITION_CENTER;
+	pld->horizontal_position = PLD_HORIZONTAL_POSITION_CENTER;
+	pld->rotation = PLD_ROTATE_0;
+	pld->visible = 1;
+	pld->group.token = group->token;
+	pld->group.position = group->position;
+
+	/* Set the shape based on port type */
+	switch (type) {
+	case UPC_TYPE_A:
+	case UPC_TYPE_USB3_A:
+	case UPC_TYPE_USB3_POWER_B:
+		pld->shape = PLD_SHAPE_HORIZONTAL_RECTANGLE;
+		break;
+	case UPC_TYPE_MINI_AB:
+	case UPC_TYPE_USB3_B:
+		pld->shape = PLD_SHAPE_CHAMFERED;
+		break;
+	case UPC_TYPE_USB3_MICRO_B:
+	case UPC_TYPE_USB3_MICRO_AB:
+		pld->shape = PLD_SHAPE_HORIZONTAL_TRAPEZOID;
+		break;
+	case UPC_TYPE_C_USB2_ONLY:
+	case UPC_TYPE_C_USB2_SS_SWITCH:
+	case UPC_TYPE_C_USB2_SS:
+		pld->shape = PLD_SHAPE_OVAL;
+		break;
+	case UPC_TYPE_INTERNAL:
+	default:
+		pld->shape = PLD_SHAPE_UNKNOWN;
+		pld->visible = 0;
+		break;
+	}
+
+	return 0;
+}
+
+int acpi_pld_to_buffer(const struct acpi_pld *pld, uint8_t *buf, int buf_len)
+{
+	if (!pld || !buf)
+		return -1;
+
+	memset(buf, 0, buf_len);
+
+	/* [0] Revision (=2) */
+	buf[0] = 0x2;
+
+	if (pld->ignore_color) {
+		/* [1] Ignore Color */
+		buf[0] |= 0x80;
+	} else {
+		/* [15:8] Red Color */
+		buf[1] = pld->color_red;
+		/* [23:16] Green Color */
+		buf[2] = pld->color_green;
+		/* [31:24] Blue Color */
+		buf[3] = pld->color_blue;
+	}
+
+	/* [47:32] Width */
+	buf[4] = pld->width & 0xff;
+	buf[5] = pld->width >> 8;
+
+	/* [63:48] Height */
+	buf[6] = pld->height & 0xff;
+	buf[7] = pld->height >> 8;
+
+	/* [64] User Visible */
+	buf[8] |= (pld->visible & 0x1);
+
+	/* [65] Dock */
+	buf[8] |= (pld->dock & 0x1) << 1;
+
+	/* [66] Lid */
+	buf[8] |= (pld->lid & 0x1) << 2;
+
+	/* [69:67] Panel */
+	buf[8] |= (pld->panel & 0x7) << 3;
+
+	/* [71:70] Vertical Position */
+	buf[8] |= (pld->vertical_position & 0x3) << 6;
+
+	/* [73:72] Horizontal Position */
+	buf[9] |= (pld->horizontal_position & 0x3);
+
+	/* [77:74] Shape */
+	buf[9] |= (pld->shape & 0xf) << 2;
+
+	/* [78] Orientation */
+	buf[9] |= (pld->orientation & 0x1) << 6;
+
+	/* [86:79] Group Token (incorrectly defined as 1 bit in ACPI 6.2A) */
+	buf[9] |= (pld->group.token & 0x1) << 7;
+	buf[10] |= (pld->group.token >> 0x1) & 0x7f;
+
+	/* [94:87] Group Position */
+	buf[10] |= (pld->group.position & 0x1) << 7;
+	buf[11] |= (pld->group.position >> 0x1) & 0x7f;
+
+	/* [95] Bay */
+	buf[11] |= (pld->bay & 0x1) << 7;
+
+	/* [96] Ejectable */
+	buf[12] |= (pld->ejectable & 0x1);
+
+	/* [97] Ejectable with OSPM help */
+	buf[12] |= (pld->ejectable_ospm & 0x1) << 1;
+
+	/* [105:98] Cabinet Number */
+	buf[12] |= (pld->cabinet_number & 0x3f) << 2;
+	buf[13] |= (pld->cabinet_number >> 6) & 0x3;
+
+	/* [113:106] Card Cage Number */
+	buf[13] |= (pld->card_cage_number & 0x3f) << 2;
+	buf[14] |= (pld->card_cage_number >> 6) & 0x3;
+
+	/* [114] PLD is a Reference Shape */
+	buf[14] |= (pld->reference_shape & 0x1) << 2;
+
+	/* [118:115] Rotation */
+	buf[14] |= (pld->rotation & 0xf) << 3;
+
+	/* [123:119] Draw Order */
+	buf[14] |= (pld->draw_order & 0x1) << 7;
+	buf[15] |= (pld->draw_order >> 1) & 0xf;
+
+	/* [127:124] Reserved */
+
+	/* Both 16 byte and 20 byte buffers are supported by the spec */
+	if (buf_len == 20) {
+		/* [143:128] Vertical Offset */
+		buf[16] = pld->vertical_offset & 0xff;
+		buf[17] = pld->vertical_offset >> 8;
+
+		/* [159:144] Horizontal Offset */
+		buf[18] = pld->horizontal_offset & 0xff;
+		buf[19] = pld->horizontal_offset >> 8;
+	}
+
+	return 0;
+}
diff --git a/src/acpi/acpigen.c b/src/acpi/acpigen.c
new file mode 100644
index 0000000000..dfc2a5adf4
--- /dev/null
+++ b/src/acpi/acpigen.c
@@ -0,0 +1,1888 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+/* How much nesting do we support? */
+#define ACPIGEN_LENSTACK_SIZE 10
+
+/*
+ * If you need to change this, change acpigen_write_len_f and
+ * acpigen_pop_len
+ */
+
+#define ACPIGEN_MAXLEN 0xfffff
+
+#include <lib.h>
+#include <string.h>
+#include <arch/acpigen.h>
+#include <assert.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci_def.h>
+#include <device/pci_type.h>
+
+static char *gencurrent;
+
+char *len_stack[ACPIGEN_LENSTACK_SIZE];
+int ltop = 0;
+
+void acpigen_write_len_f(void)
+{
+	ASSERT(ltop < (ACPIGEN_LENSTACK_SIZE - 1))
+	len_stack[ltop++] = gencurrent;
+	acpigen_emit_byte(0);
+	acpigen_emit_byte(0);
+	acpigen_emit_byte(0);
+}
+
+void acpigen_pop_len(void)
+{
+	int len;
+	ASSERT(ltop > 0)
+	char *p = len_stack[--ltop];
+	len = gencurrent - p;
+	ASSERT(len <= ACPIGEN_MAXLEN)
+	/* generate store length for 0xfffff max */
+	p[0] = (0x80 | (len & 0xf));
+	p[1] = (len >> 4 & 0xff);
+	p[2] = (len >> 12 & 0xff);
+
+}
+
+void acpigen_set_current(char *curr)
+{
+	gencurrent = curr;
+}
+
+char *acpigen_get_current(void)
+{
+	return gencurrent;
+}
+
+void acpigen_emit_byte(unsigned char b)
+{
+	(*gencurrent++) = b;
+}
+
+void acpigen_emit_ext_op(uint8_t op)
+{
+	acpigen_emit_byte(EXT_OP_PREFIX);
+	acpigen_emit_byte(op);
+}
+
+void acpigen_emit_word(unsigned int data)
+{
+	acpigen_emit_byte(data & 0xff);
+	acpigen_emit_byte((data >> 8) & 0xff);
+}
+
+void acpigen_emit_dword(unsigned int data)
+{
+	acpigen_emit_byte(data & 0xff);
+	acpigen_emit_byte((data >> 8) & 0xff);
+	acpigen_emit_byte((data >> 16) & 0xff);
+	acpigen_emit_byte((data >> 24) & 0xff);
+}
+
+char *acpigen_write_package(int nr_el)
+{
+	char *p;
+	acpigen_emit_byte(PACKAGE_OP);
+	acpigen_write_len_f();
+	p = acpigen_get_current();
+	acpigen_emit_byte(nr_el);
+	return p;
+}
+
+void acpigen_write_byte(unsigned int data)
+{
+	acpigen_emit_byte(BYTE_PREFIX);
+	acpigen_emit_byte(data & 0xff);
+}
+
+void acpigen_write_word(unsigned int data)
+{
+	acpigen_emit_byte(WORD_PREFIX);
+	acpigen_emit_word(data);
+}
+
+void acpigen_write_dword(unsigned int data)
+{
+	acpigen_emit_byte(DWORD_PREFIX);
+	acpigen_emit_dword(data);
+}
+
+void acpigen_write_qword(uint64_t data)
+{
+	acpigen_emit_byte(QWORD_PREFIX);
+	acpigen_emit_dword(data & 0xffffffff);
+	acpigen_emit_dword((data >> 32) & 0xffffffff);
+}
+
+void acpigen_write_zero(void)
+{
+	acpigen_emit_byte(ZERO_OP);
+}
+
+void acpigen_write_one(void)
+{
+	acpigen_emit_byte(ONE_OP);
+}
+
+void acpigen_write_ones(void)
+{
+	acpigen_emit_byte(ONES_OP);
+}
+
+void acpigen_write_integer(uint64_t data)
+{
+	if (data == 0)
+		acpigen_write_zero();
+	else if (data == 1)
+		acpigen_write_one();
+	else if (data <= 0xff)
+		acpigen_write_byte((unsigned char)data);
+	else if (data <= 0xffff)
+		acpigen_write_word((unsigned int)data);
+	else if (data <= 0xffffffff)
+		acpigen_write_dword((unsigned int)data);
+	else
+		acpigen_write_qword(data);
+}
+
+void acpigen_write_name_zero(const char *name)
+{
+	acpigen_write_name(name);
+	acpigen_write_one();
+}
+
+void acpigen_write_name_one(const char *name)
+{
+	acpigen_write_name(name);
+	acpigen_write_zero();
+}
+
+void acpigen_write_name_byte(const char *name, uint8_t val)
+{
+	acpigen_write_name(name);
+	acpigen_write_byte(val);
+}
+
+void acpigen_write_name_dword(const char *name, uint32_t val)
+{
+	acpigen_write_name(name);
+	acpigen_write_dword(val);
+}
+
+void acpigen_write_name_qword(const char *name, uint64_t val)
+{
+	acpigen_write_name(name);
+	acpigen_write_qword(val);
+}
+
+void acpigen_write_name_integer(const char *name, uint64_t val)
+{
+	acpigen_write_name(name);
+	acpigen_write_integer(val);
+}
+
+void acpigen_write_name_string(const char *name, const char *string)
+{
+	acpigen_write_name(name);
+	acpigen_write_string(string);
+}
+
+void acpigen_write_name_unicode(const char *name, const char *string)
+{
+	const size_t len = strlen(string) + 1;
+	acpigen_write_name(name);
+	acpigen_emit_byte(BUFFER_OP);
+	acpigen_write_len_f();
+	acpigen_write_integer(len);
+	for (size_t i = 0; i < len; i++) {
+		const char c = string[i];
+		/* Simple ASCII to UTF-16 conversion, replace non ASCII characters */
+		acpigen_emit_word(c >= 0 ? c : '?');
+	}
+	acpigen_pop_len();
+}
+
+void acpigen_emit_stream(const char *data, int size)
+{
+	int i;
+	for (i = 0; i < size; i++)
+		acpigen_emit_byte(data[i]);
+}
+
+void acpigen_emit_string(const char *string)
+{
+	acpigen_emit_stream(string, string ? strlen(string) : 0);
+	acpigen_emit_byte('\0'); /* NUL */
+}
+
+void acpigen_write_string(const char *string)
+{
+	acpigen_emit_byte(STRING_PREFIX);
+	acpigen_emit_string(string);
+}
+
+void acpigen_write_coreboot_hid(enum coreboot_acpi_ids id)
+{
+	char hid[9]; /* BOOTxxxx */
+
+	snprintf(hid, sizeof(hid), "%.4s%04X", COREBOOT_ACPI_ID, id);
+	acpigen_write_name_string("_HID", hid);
+}
+
+/*
+ * The naming conventions for ACPI namespace names are a bit tricky as
+ * each element has to be 4 chars wide ("All names are a fixed 32 bits.")
+ * and "By convention, when an ASL compiler pads a name shorter than 4
+ * characters, it is done so with trailing underscores ('_')".
+ *
+ * Check sections 5.3, 18.2.2 and 18.4 of ACPI spec 3.0 for details.
+ */
+
+static void acpigen_emit_simple_namestring(const char *name)
+{
+	int i;
+	char ud[] = "____";
+	for (i = 0; i < 4; i++) {
+		if ((name[i] == '\0') || (name[i] == '.')) {
+			acpigen_emit_stream(ud, 4 - i);
+			break;
+		}
+		acpigen_emit_byte(name[i]);
+	}
+}
+
+static void acpigen_emit_double_namestring(const char *name, int dotpos)
+{
+	acpigen_emit_byte(DUAL_NAME_PREFIX);
+	acpigen_emit_simple_namestring(name);
+	acpigen_emit_simple_namestring(&name[dotpos + 1]);
+}
+
+static void acpigen_emit_multi_namestring(const char *name)
+{
+	int count = 0;
+	unsigned char *pathlen;
+	acpigen_emit_byte(MULTI_NAME_PREFIX);
+	acpigen_emit_byte(ZERO_OP);
+	pathlen = ((unsigned char *) acpigen_get_current()) - 1;
+
+	while (name[0] != '\0') {
+		acpigen_emit_simple_namestring(name);
+		/* find end or next entity */
+		while ((name[0] != '.') && (name[0] != '\0'))
+			name++;
+		/* forward to next */
+		if (name[0] == '.')
+			name++;
+		count++;
+	}
+
+	pathlen[0] = count;
+}
+
+
+void acpigen_emit_namestring(const char *namepath)
+{
+	int dotcount = 0, i;
+	int dotpos = 0;
+
+	/* We can start with a '\'. */
+	if (namepath[0] == '\\') {
+		acpigen_emit_byte('\\');
+		namepath++;
+	}
+
+	/* And there can be any number of '^' */
+	while (namepath[0] == '^') {
+		acpigen_emit_byte('^');
+		namepath++;
+	}
+
+	/* If we have only \\ or only ^...^. Then we need to put a null
+	   name (0x00). */
+	if (namepath[0] == '\0') {
+		acpigen_emit_byte(ZERO_OP);
+		return;
+	}
+
+	i = 0;
+	while (namepath[i] != '\0') {
+		if (namepath[i] == '.') {
+			dotcount++;
+			dotpos = i;
+		}
+		i++;
+	}
+
+	if (dotcount == 0)
+		acpigen_emit_simple_namestring(namepath);
+	else if (dotcount == 1)
+		acpigen_emit_double_namestring(namepath, dotpos);
+	else
+		acpigen_emit_multi_namestring(namepath);
+}
+
+void acpigen_write_name(const char *name)
+{
+	acpigen_emit_byte(NAME_OP);
+	acpigen_emit_namestring(name);
+}
+
+void acpigen_write_scope(const char *name)
+{
+	acpigen_emit_byte(SCOPE_OP);
+	acpigen_write_len_f();
+	acpigen_emit_namestring(name);
+}
+
+void acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len)
+{
+/*
+	Processor (\_SB.CPcpuindex, cpuindex, pblock_addr, pblock_len)
+	{
+*/
+	char pscope[16];
+	acpigen_emit_ext_op(PROCESSOR_OP);
+	acpigen_write_len_f();
+
+	snprintf(pscope, sizeof(pscope),
+		 CONFIG_ACPI_CPU_STRING, (unsigned int) cpuindex);
+	acpigen_emit_namestring(pscope);
+	acpigen_emit_byte(cpuindex);
+	acpigen_emit_dword(pblock_addr);
+	acpigen_emit_byte(pblock_len);
+}
+
+void acpigen_write_processor_package(const char *const name,
+				     const unsigned int first_core,
+				     const unsigned int core_count)
+{
+	unsigned int i;
+	char pscope[16];
+
+	acpigen_write_name(name);
+	acpigen_write_package(core_count);
+	for (i = first_core; i < first_core + core_count; ++i) {
+		snprintf(pscope, sizeof(pscope), CONFIG_ACPI_CPU_STRING, i);
+		acpigen_emit_namestring(pscope);
+	}
+	acpigen_pop_len();
+}
+
+/* Method to notify all CPU cores */
+void acpigen_write_processor_cnot(const unsigned int number_of_cores)
+{
+	int core_id;
+
+	acpigen_write_method("\\_SB.CNOT", 1);
+	for (core_id = 0; core_id < number_of_cores; core_id++) {
+		char buffer[DEVICE_PATH_MAX];
+		snprintf(buffer, sizeof(buffer), CONFIG_ACPI_CPU_STRING,
+			 core_id);
+		acpigen_emit_byte(NOTIFY_OP);
+		acpigen_emit_namestring(buffer);
+		acpigen_emit_byte(ARG0_OP);
+	}
+	acpigen_pop_len();
+}
+
+/*
+ * Generate ACPI AML code for OperationRegion
+ * Arg0: Pointer to struct opregion opreg = OPREGION(rname, space, offset, len)
+ * where rname is region name, space is region space, offset is region offset &
+ * len is region length.
+ * OperationRegion(regionname, regionspace, regionoffset, regionlength)
+ */
+void acpigen_write_opregion(struct opregion *opreg)
+{
+	/* OpregionOp */
+	acpigen_emit_ext_op(OPREGION_OP);
+	/* NameString 4 chars only */
+	acpigen_emit_simple_namestring(opreg->name);
+	/* RegionSpace */
+	acpigen_emit_byte(opreg->regionspace);
+	/* RegionOffset & RegionLen, it can be byte word or double word */
+	acpigen_write_integer(opreg->regionoffset);
+	acpigen_write_integer(opreg->regionlen);
+}
+
+/*
+ * Generate ACPI AML code for Mutex
+ * Arg0: Pointer to name of mutex
+ * Arg1: Initial value of mutex
+ */
+void acpigen_write_mutex(const char *name, const uint8_t flags)
+{
+	/* MutexOp */
+	acpigen_emit_ext_op(MUTEX_OP);
+	/* NameString 4 chars only */
+	acpigen_emit_simple_namestring(name);
+	acpigen_emit_byte(flags);
+}
+
+void acpigen_write_acquire(const char *name, const uint16_t val)
+{
+	/* AcquireOp */
+	acpigen_emit_ext_op(ACQUIRE_OP);
+	/* NameString 4 chars only */
+	acpigen_emit_simple_namestring(name);
+	acpigen_emit_word(val);
+}
+
+void acpigen_write_release(const char *name)
+{
+	/* ReleaseOp */
+	acpigen_emit_ext_op(RELEASE_OP);
+	/* NameString 4 chars only */
+	acpigen_emit_simple_namestring(name);
+}
+
+static void acpigen_write_field_length(uint32_t len)
+{
+	uint8_t i, j;
+	uint8_t emit[4];
+
+	i = 1;
+	if (len < 0x40) {
+		emit[0] = len & 0x3F;
+	} else {
+		emit[0] = len & 0xF;
+		len >>= 4;
+		while (len) {
+			emit[i] = len & 0xFF;
+			i++;
+			len >>= 8;
+		}
+	}
+	/* Update bit 7:6 : Number of bytes followed by emit[0] */
+	emit[0] |= (i - 1) << 6;
+
+	for (j = 0; j < i; j++)
+		acpigen_emit_byte(emit[j]);
+}
+
+static void acpigen_write_field_offset(uint32_t offset,
+				       uint32_t current_bit_pos)
+{
+	uint32_t diff_bits;
+
+	if (offset < current_bit_pos) {
+		printk(BIOS_WARNING, "%s: Cannot move offset backward",
+			__func__);
+		return;
+	}
+
+	diff_bits = offset - current_bit_pos;
+	/* Upper limit */
+	if (diff_bits > 0xFFFFFFF) {
+		printk(BIOS_WARNING, "%s: Offset very large to encode",
+			__func__);
+		return;
+	}
+
+	acpigen_emit_byte(0);
+	acpigen_write_field_length(diff_bits);
+}
+
+static void acpigen_write_field_name(const char *name, uint32_t size)
+{
+	acpigen_emit_simple_namestring(name);
+	acpigen_write_field_length(size);
+}
+
+/*
+ * Generate ACPI AML code for Field
+ * Arg0: region name
+ * Arg1: Pointer to struct fieldlist.
+ * Arg2: no. of entries in Arg1
+ * Arg3: flags which indicate filed access type, lock rule  & update rule.
+ * Example with fieldlist
+ * struct fieldlist l[] = {
+ *	FIELDLIST_OFFSET(0x84),
+ *	FIELDLIST_NAMESTR("PMCS", 2),
+ *	};
+ * acpigen_write_field("UART", l, ARRAY_SIZE(l), FIELD_ANYACC | FIELD_NOLOCK |
+ *								FIELD_PRESERVE);
+ * Output:
+ * Field (UART, AnyAcc, NoLock, Preserve)
+ *	{
+ *		Offset (0x84),
+ *		PMCS,   2
+ *	}
+ */
+void acpigen_write_field(const char *name, const struct fieldlist *l, size_t count,
+			 uint8_t flags)
+{
+	uint16_t i;
+	uint32_t current_bit_pos = 0;
+
+	/* FieldOp */
+	acpigen_emit_ext_op(FIELD_OP);
+	/* Package Length */
+	acpigen_write_len_f();
+	/* NameString 4 chars only */
+	acpigen_emit_simple_namestring(name);
+	/* Field Flag */
+	acpigen_emit_byte(flags);
+
+	for (i = 0; i < count; i++) {
+		switch (l[i].type) {
+		case NAME_STRING:
+			acpigen_write_field_name(l[i].name, l[i].bits);
+			current_bit_pos += l[i].bits;
+			break;
+		case OFFSET:
+			acpigen_write_field_offset(l[i].bits, current_bit_pos);
+			current_bit_pos = l[i].bits;
+			break;
+		default:
+			printk(BIOS_ERR, "%s: Invalid field type 0x%X\n"
+				, __func__, l[i].type);
+			break;
+		}
+	}
+	acpigen_pop_len();
+}
+
+/*
+ * Generate ACPI AML code for IndexField
+ * Arg0: region name
+ * Arg1: Pointer to struct fieldlist.
+ * Arg2: no. of entries in Arg1
+ * Arg3: flags which indicate filed access type, lock rule  & update rule.
+ * Example with fieldlist
+ * struct fieldlist l[] = {
+ *	FIELDLIST_OFFSET(0x84),
+ *	FIELDLIST_NAMESTR("PMCS", 2),
+ *	};
+ * acpigen_write_field("IDX", "DATA" l, ARRAY_SIZE(l), FIELD_ANYACC |
+ *						       FIELD_NOLOCK |
+ *						       FIELD_PRESERVE);
+ * Output:
+ * IndexField (IDX, DATA, AnyAcc, NoLock, Preserve)
+ *	{
+ *		Offset (0x84),
+ *		PMCS,   2
+ *	}
+ */
+void acpigen_write_indexfield(const char *idx, const char *data,
+			      struct fieldlist *l, size_t count, uint8_t flags)
+{
+	uint16_t i;
+	uint32_t current_bit_pos = 0;
+
+	/* FieldOp */
+	acpigen_emit_ext_op(INDEX_FIELD_OP);
+	/* Package Length */
+	acpigen_write_len_f();
+	/* NameString 4 chars only */
+	acpigen_emit_simple_namestring(idx);
+	/* NameString 4 chars only */
+	acpigen_emit_simple_namestring(data);
+	/* Field Flag */
+	acpigen_emit_byte(flags);
+
+	for (i = 0; i < count; i++) {
+		switch (l[i].type) {
+		case NAME_STRING:
+			acpigen_write_field_name(l[i].name, l[i].bits);
+			current_bit_pos += l[i].bits;
+			break;
+		case OFFSET:
+			acpigen_write_field_offset(l[i].bits, current_bit_pos);
+			current_bit_pos = l[i].bits;
+			break;
+		default:
+			printk(BIOS_ERR, "%s: Invalid field type 0x%X\n"
+				, __func__, l[i].type);
+			break;
+		}
+	}
+	acpigen_pop_len();
+}
+
+void acpigen_write_empty_PCT(void)
+{
+/*
+	Name (_PCT, Package (0x02)
+	{
+		ResourceTemplate ()
+		{
+			Register (FFixedHW,
+				0x00,               // Bit Width
+				0x00,               // Bit Offset
+				0x0000000000000000, // Address
+				,)
+		},
+
+		ResourceTemplate ()
+		{
+			Register (FFixedHW,
+				0x00,               // Bit Width
+				0x00,               // Bit Offset
+				0x0000000000000000, // Address
+				,)
+		}
+	})
+*/
+	static char stream[] = {
+		/* 00000030    "0._PCT.," */
+		0x08, 0x5F, 0x50, 0x43, 0x54, 0x12, 0x2C,
+		/* 00000038    "........" */
+		0x02, 0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00,
+		/* 00000040    "........" */
+		0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		/* 00000048    "....y..." */
+		0x00, 0x00, 0x00, 0x00, 0x79, 0x00, 0x11, 0x14,
+		/* 00000050    "........" */
+		0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F, 0x00, 0x00,
+		/* 00000058    "........" */
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x79, 0x00
+	};
+	acpigen_emit_stream(stream, ARRAY_SIZE(stream));
+}
+
+void acpigen_write_empty_PTC(void)
+{
+/*
+	Name (_PTC, Package (0x02)
+	{
+		ResourceTemplate ()
+		{
+			Register (FFixedHW,
+				0x00,               // Bit Width
+				0x00,               // Bit Offset
+				0x0000000000000000, // Address
+				,)
+		},
+
+		ResourceTemplate ()
+		{
+			Register (FFixedHW,
+				0x00,               // Bit Width
+				0x00,               // Bit Offset
+				0x0000000000000000, // Address
+				,)
+		}
+	})
+*/
+	acpi_addr_t addr = {
+		.space_id    = ACPI_ADDRESS_SPACE_FIXED,
+		.bit_width   = 0,
+		.bit_offset  = 0,
+		.access_size = 0,
+		.addrl       = 0,
+		.addrh       = 0,
+	};
+
+	acpigen_write_name("_PTC");
+	acpigen_write_package(2);
+
+	/* ControlRegister */
+	acpigen_write_register_resource(&addr);
+
+	/* StatusRegister */
+	acpigen_write_register_resource(&addr);
+
+	acpigen_pop_len();
+}
+
+static void __acpigen_write_method(const char *name, uint8_t flags)
+{
+	acpigen_emit_byte(METHOD_OP);
+	acpigen_write_len_f();
+	acpigen_emit_namestring(name);
+	acpigen_emit_byte(flags);
+}
+
+/* Method (name, nargs, NotSerialized) */
+void acpigen_write_method(const char *name, int nargs)
+{
+	__acpigen_write_method(name, (nargs & 7));
+}
+
+/* Method (name, nargs, Serialized) */
+void acpigen_write_method_serialized(const char *name, int nargs)
+{
+	__acpigen_write_method(name, (nargs & 7) | (1 << 3));
+}
+
+void acpigen_write_device(const char *name)
+{
+	acpigen_emit_ext_op(DEVICE_OP);
+	acpigen_write_len_f();
+	acpigen_emit_namestring(name);
+}
+
+void acpigen_write_STA(uint8_t status)
+{
+	/*
+	 * Method (_STA, 0, NotSerialized) { Return (status) }
+	 */
+	acpigen_write_method("_STA", 0);
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_write_byte(status);
+	acpigen_pop_len();
+}
+
+/*
+ * Generates a func with max supported P-states.
+ */
+void acpigen_write_PPC(u8 nr)
+{
+/*
+	Method (_PPC, 0, NotSerialized)
+	{
+		Return (nr)
+	}
+*/
+	acpigen_write_method("_PPC", 0);
+	acpigen_emit_byte(RETURN_OP);
+	/* arg */
+	acpigen_write_byte(nr);
+	acpigen_pop_len();
+}
+
+/*
+ * Generates a func with max supported P-states saved
+ * in the variable PPCM.
+ */
+void acpigen_write_PPC_NVS(void)
+{
+/*
+	Method (_PPC, 0, NotSerialized)
+	{
+		Return (PPCM)
+	}
+*/
+	acpigen_write_method("_PPC", 0);
+	acpigen_emit_byte(RETURN_OP);
+	/* arg */
+	acpigen_emit_namestring("PPCM");
+	acpigen_pop_len();
+}
+
+void acpigen_write_TPC(const char *gnvs_tpc_limit)
+{
+/*
+	// Sample _TPC method
+	Method (_TPC, 0, NotSerialized)
+	{
+		Return (\TLVL)
+	}
+*/
+	acpigen_write_method("_TPC", 0);
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_emit_namestring(gnvs_tpc_limit);
+	acpigen_pop_len();
+}
+
+void acpigen_write_PRW(u32 wake, u32 level)
+{
+	/*
+	 * Name (_PRW, Package () { wake, level }
+	 */
+	acpigen_write_name("_PRW");
+	acpigen_write_package(2);
+	acpigen_write_integer(wake);
+	acpigen_write_integer(level);
+	acpigen_pop_len();
+}
+
+void acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat,
+			      u32 busmLat, u32 control, u32 status)
+{
+	acpigen_write_package(6);
+	acpigen_write_dword(coreFreq);
+	acpigen_write_dword(power);
+	acpigen_write_dword(transLat);
+	acpigen_write_dword(busmLat);
+	acpigen_write_dword(control);
+	acpigen_write_dword(status);
+	acpigen_pop_len();
+
+	printk(BIOS_DEBUG, "PSS: %uMHz power %u control 0x%x status 0x%x\n",
+	       coreFreq, power, control, status);
+}
+
+void acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype)
+{
+	acpigen_write_name("_PSD");
+	acpigen_write_package(1);
+	acpigen_write_package(5);
+	acpigen_write_byte(5);	// 5 values
+	acpigen_write_byte(0);	// revision 0
+	acpigen_write_dword(domain);
+	acpigen_write_dword(coordtype);
+	acpigen_write_dword(numprocs);
+	acpigen_pop_len();
+	acpigen_pop_len();
+}
+
+void acpigen_write_CST_package_entry(acpi_cstate_t *cstate)
+{
+	acpigen_write_package(4);
+	acpigen_write_register_resource(&cstate->resource);
+	acpigen_write_dword(cstate->ctype);
+	acpigen_write_dword(cstate->latency);
+	acpigen_write_dword(cstate->power);
+	acpigen_pop_len();
+}
+
+void acpigen_write_CST_package(acpi_cstate_t *cstate, int nentries)
+{
+	int i;
+	acpigen_write_name("_CST");
+	acpigen_write_package(nentries+1);
+	acpigen_write_dword(nentries);
+
+	for (i = 0; i < nentries; i++)
+		acpigen_write_CST_package_entry(cstate + i);
+
+	acpigen_pop_len();
+}
+
+void acpigen_write_CSD_package(u32 domain, u32 numprocs, CSD_coord coordtype,
+	u32 index)
+{
+	acpigen_write_name("_CSD");
+	acpigen_write_package(1);
+	acpigen_write_package(6);
+	acpigen_write_byte(6);	// 6 values
+	acpigen_write_byte(0);	// revision 0
+	acpigen_write_dword(domain);
+	acpigen_write_dword(coordtype);
+	acpigen_write_dword(numprocs);
+	acpigen_write_dword(index);
+	acpigen_pop_len();
+	acpigen_pop_len();
+}
+
+void acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list)
+{
+/*
+	Sample _TSS package with 100% and 50% duty cycles
+	Name (_TSS, Package (0x02)
+	{
+		Package(){100, 1000, 0, 0x00, 0)
+		Package(){50, 520, 0, 0x18, 0)
+	})
+*/
+	int i;
+	acpi_tstate_t *tstate = tstate_list;
+
+	acpigen_write_name("_TSS");
+	acpigen_write_package(entries);
+
+	for (i = 0; i < entries; i++) {
+		acpigen_write_package(5);
+		acpigen_write_dword(tstate->percent);
+		acpigen_write_dword(tstate->power);
+		acpigen_write_dword(tstate->latency);
+		acpigen_write_dword(tstate->control);
+		acpigen_write_dword(tstate->status);
+		acpigen_pop_len();
+		tstate++;
+	}
+
+	acpigen_pop_len();
+}
+
+void acpigen_write_TSD_package(u32 domain, u32 numprocs, PSD_coord coordtype)
+{
+	acpigen_write_name("_TSD");
+	acpigen_write_package(1);
+	acpigen_write_package(5);
+	acpigen_write_byte(5);	// 5 values
+	acpigen_write_byte(0);	// revision 0
+	acpigen_write_dword(domain);
+	acpigen_write_dword(coordtype);
+	acpigen_write_dword(numprocs);
+	acpigen_pop_len();
+	acpigen_pop_len();
+}
+
+
+
+void acpigen_write_mem32fixed(int readwrite, u32 base, u32 size)
+{
+	/*
+	 * ACPI 4.0 section 6.4.3.4: 32-Bit Fixed Memory Range Descriptor
+	 * Byte 0:
+	 *   Bit7  : 1 => big item
+	 *   Bit6-0: 0000110 (0x6) => 32-bit fixed memory
+	 */
+	acpigen_emit_byte(0x86);
+	/* Byte 1+2: length (0x0009) */
+	acpigen_emit_byte(0x09);
+	acpigen_emit_byte(0x00);
+	/* bit1-7 are ignored */
+	acpigen_emit_byte(readwrite ? 0x01 : 0x00);
+	acpigen_emit_dword(base);
+	acpigen_emit_dword(size);
+}
+
+static void acpigen_write_register(const acpi_addr_t *addr)
+{
+	acpigen_emit_byte(0x82);		/* Register Descriptor */
+	acpigen_emit_byte(0x0c);		/* Register Length 7:0 */
+	acpigen_emit_byte(0x00);		/* Register Length 15:8 */
+	acpigen_emit_byte(addr->space_id);	/* Address Space ID */
+	acpigen_emit_byte(addr->bit_width);	/* Register Bit Width */
+	acpigen_emit_byte(addr->bit_offset);	/* Register Bit Offset */
+	acpigen_emit_byte(addr->access_size);	/* Register Access Size */
+	acpigen_emit_dword(addr->addrl);	/* Register Address Low */
+	acpigen_emit_dword(addr->addrh);	/* Register Address High */
+}
+
+void acpigen_write_register_resource(const acpi_addr_t *addr)
+{
+	acpigen_write_resourcetemplate_header();
+	acpigen_write_register(addr);
+	acpigen_write_resourcetemplate_footer();
+}
+
+void acpigen_write_irq(u16 mask)
+{
+	/*
+	 * ACPI 3.0b section 6.4.2.1: IRQ Descriptor
+	 * Byte 0:
+	 *   Bit7  : 0 => small item
+	 *   Bit6-3: 0100 (0x4) => IRQ port descriptor
+	 *   Bit2-0: 010 (0x2) => 2 Bytes long
+	 */
+	acpigen_emit_byte(0x22);
+	acpigen_emit_byte(mask & 0xff);
+	acpigen_emit_byte((mask >> 8) & 0xff);
+}
+
+void acpigen_write_io16(u16 min, u16 max, u8 align, u8 len, u8 decode16)
+{
+	/*
+	 * ACPI 4.0 section 6.4.2.6: I/O Port Descriptor
+	 * Byte 0:
+	 *   Bit7  : 0 => small item
+	 *   Bit6-3: 1000 (0x8) => I/O port descriptor
+	 *   Bit2-0: 111 (0x7) => 7 Bytes long
+	 */
+	acpigen_emit_byte(0x47);
+	/* Does the device decode all 16 or just 10 bits? */
+	/* bit1-7 are ignored */
+	acpigen_emit_byte(decode16 ? 0x01 : 0x00);
+	/* minimum base address the device may be configured for */
+	acpigen_emit_byte(min & 0xff);
+	acpigen_emit_byte((min >> 8) & 0xff);
+	/* maximum base address the device may be configured for */
+	acpigen_emit_byte(max & 0xff);
+	acpigen_emit_byte((max >> 8) & 0xff);
+	/* alignment for min base */
+	acpigen_emit_byte(align & 0xff);
+	acpigen_emit_byte(len & 0xff);
+}
+
+void acpigen_write_resourcetemplate_header(void)
+{
+	/*
+	 * A ResourceTemplate() is a Buffer() with a
+	 * (Byte|Word|DWord) containing the length, followed by one or more
+	 * resource items, terminated by the end tag.
+	 * (small item 0xf, len 1)
+	 */
+	acpigen_emit_byte(BUFFER_OP);
+	acpigen_write_len_f();
+	acpigen_emit_byte(WORD_PREFIX);
+	len_stack[ltop++] = acpigen_get_current();
+	/* Add 2 dummy bytes for the ACPI word (keep aligned with
+	   the calculation in acpigen_write_resourcetemplate() below). */
+	acpigen_emit_byte(0x00);
+	acpigen_emit_byte(0x00);
+}
+
+void acpigen_write_resourcetemplate_footer(void)
+{
+	char *p = len_stack[--ltop];
+	int len;
+	/*
+	 * end tag (acpi 4.0 Section 6.4.2.8)
+	 * 0x79 <checksum>
+	 * 0x00 is treated as a good checksum according to the spec
+	 * and is what iasl generates.
+	 */
+	acpigen_emit_byte(0x79);
+	acpigen_emit_byte(0x00);
+
+	/* Start counting past the 2-bytes length added in
+	   acpigen_write_resourcetemplate() above. */
+	len = acpigen_get_current() - (p + 2);
+
+	/* patch len word */
+	p[0] = len & 0xff;
+	p[1] = (len >> 8) & 0xff;
+	/* patch len field */
+	acpigen_pop_len();
+}
+
+static void acpigen_add_mainboard_rsvd_mem32(void *gp, struct device *dev,
+						struct resource *res)
+{
+	acpigen_write_mem32fixed(0, res->base, res->size);
+}
+
+static void acpigen_add_mainboard_rsvd_io(void *gp, struct device *dev,
+						struct resource *res)
+{
+	resource_t base = res->base;
+	resource_t size = res->size;
+	while (size > 0) {
+		resource_t sz = size > 255 ? 255 : size;
+		acpigen_write_io16(base, base, 0, sz, 1);
+		size -= sz;
+		base += sz;
+	}
+}
+
+void acpigen_write_mainboard_resource_template(void)
+{
+	acpigen_write_resourcetemplate_header();
+
+	/* Add reserved memory ranges. */
+	search_global_resources(
+		IORESOURCE_MEM | IORESOURCE_RESERVE,
+		 IORESOURCE_MEM | IORESOURCE_RESERVE,
+		acpigen_add_mainboard_rsvd_mem32, 0);
+
+	/* Add reserved io ranges. */
+	search_global_resources(
+		IORESOURCE_IO | IORESOURCE_RESERVE,
+		 IORESOURCE_IO | IORESOURCE_RESERVE,
+		acpigen_add_mainboard_rsvd_io, 0);
+
+	acpigen_write_resourcetemplate_footer();
+}
+
+void acpigen_write_mainboard_resources(const char *scope, const char *name)
+{
+	acpigen_write_scope(scope);
+	acpigen_write_name(name);
+	acpigen_write_mainboard_resource_template();
+	acpigen_pop_len();
+}
+
+static int hex2bin(const char c)
+{
+	if (c >= 'A' && c <= 'F')
+		return c - 'A' + 10;
+	if (c >= 'a' && c <= 'f')
+		return c - 'a' + 10;
+	return c - '0';
+}
+
+void acpigen_emit_eisaid(const char *eisaid)
+{
+	u32 compact = 0;
+
+	/* Clamping individual values would be better but
+	   there is a disagreement over what is a valid
+	   EISA id, so accept anything and don't clamp,
+	   parent code should create a valid EISAid.
+	 */
+	compact |= (eisaid[0] - 'A' + 1) << 26;
+	compact |= (eisaid[1] - 'A' + 1) << 21;
+	compact |= (eisaid[2] - 'A' + 1) << 16;
+	compact |= hex2bin(eisaid[3]) << 12;
+	compact |= hex2bin(eisaid[4]) << 8;
+	compact |= hex2bin(eisaid[5]) << 4;
+	compact |= hex2bin(eisaid[6]);
+
+	acpigen_emit_byte(0xc);
+	acpigen_emit_byte((compact >> 24) & 0xff);
+	acpigen_emit_byte((compact >> 16) & 0xff);
+	acpigen_emit_byte((compact >> 8) & 0xff);
+	acpigen_emit_byte(compact & 0xff);
+}
+
+/*
+ * ToUUID(uuid)
+ *
+ * ACPI 6.1 Section 19.6.136 table 19-385 defines a special output
+ * order for the bytes that make up a UUID Buffer object.
+ * UUID byte order for input:
+ *   aabbccdd-eeff-gghh-iijj-kkllmmnnoopp
+ * UUID byte order for output:
+ *   ddccbbaa-ffee-hhgg-iijj-kkllmmnnoopp
+ */
+#define UUID_LEN 16
+void acpigen_write_uuid(const char *uuid)
+{
+	uint8_t buf[UUID_LEN];
+	size_t i, order[UUID_LEN] = { 3, 2, 1, 0, 5, 4, 7, 6,
+				      8, 9, 10, 11, 12, 13, 14, 15 };
+
+	/* Parse UUID string into bytes */
+	if (hexstrtobin(uuid, buf, UUID_LEN) < UUID_LEN)
+		return;
+
+	/* BufferOp */
+	acpigen_emit_byte(BUFFER_OP);
+	acpigen_write_len_f();
+
+	/* Buffer length in bytes */
+	acpigen_write_word(UUID_LEN);
+
+	/* Output UUID in expected order */
+	for (i = 0; i < UUID_LEN; i++)
+		acpigen_emit_byte(buf[order[i]]);
+
+	acpigen_pop_len();
+}
+
+/*
+ * Name (_PRx, Package(One) { name })
+ * ...
+ * PowerResource (name, level, order)
+ */
+void acpigen_write_power_res(const char *name, uint8_t level, uint16_t order,
+			     const char * const dev_states[], size_t dev_states_count)
+{
+	size_t i;
+	for (i = 0; i < dev_states_count; i++) {
+		acpigen_write_name(dev_states[i]);
+		acpigen_write_package(1);
+		acpigen_emit_simple_namestring(name);
+		acpigen_pop_len();		/* Package */
+	}
+
+	acpigen_emit_ext_op(POWER_RES_OP);
+
+	acpigen_write_len_f();
+
+	acpigen_emit_simple_namestring(name);
+	acpigen_emit_byte(level);
+	acpigen_emit_word(order);
+}
+
+/* Sleep (ms) */
+void acpigen_write_sleep(uint64_t sleep_ms)
+{
+	acpigen_emit_ext_op(SLEEP_OP);
+	acpigen_write_integer(sleep_ms);
+}
+
+void acpigen_write_store(void)
+{
+	acpigen_emit_byte(STORE_OP);
+}
+
+/* Store (src, dst) */
+void acpigen_write_store_ops(uint8_t src, uint8_t dst)
+{
+	acpigen_write_store();
+	acpigen_emit_byte(src);
+	acpigen_emit_byte(dst);
+}
+
+/* Store (src, "namestr") */
+void acpigen_write_store_op_to_namestr(uint8_t src, const char *dst)
+{
+	acpigen_write_store();
+	acpigen_emit_byte(src);
+	acpigen_emit_namestring(dst);
+}
+
+/* Or (arg1, arg2, res) */
+void acpigen_write_or(uint8_t arg1, uint8_t arg2, uint8_t res)
+{
+	acpigen_emit_byte(OR_OP);
+	acpigen_emit_byte(arg1);
+	acpigen_emit_byte(arg2);
+	acpigen_emit_byte(res);
+}
+
+/* Xor (arg1, arg2, res) */
+void acpigen_write_xor(uint8_t arg1, uint8_t arg2, uint8_t res)
+{
+	acpigen_emit_byte(XOR_OP);
+	acpigen_emit_byte(arg1);
+	acpigen_emit_byte(arg2);
+	acpigen_emit_byte(res);
+}
+
+/* And (arg1, arg2, res) */
+void acpigen_write_and(uint8_t arg1, uint8_t arg2, uint8_t res)
+{
+	acpigen_emit_byte(AND_OP);
+	acpigen_emit_byte(arg1);
+	acpigen_emit_byte(arg2);
+	acpigen_emit_byte(res);
+}
+
+/* Not (arg, res) */
+void acpigen_write_not(uint8_t arg, uint8_t res)
+{
+	acpigen_emit_byte(NOT_OP);
+	acpigen_emit_byte(arg);
+	acpigen_emit_byte(res);
+}
+
+/* Store (str, DEBUG) */
+void acpigen_write_debug_string(const char *str)
+{
+	acpigen_write_store();
+	acpigen_write_string(str);
+	acpigen_emit_ext_op(DEBUG_OP);
+}
+
+/* Store (val, DEBUG) */
+void acpigen_write_debug_integer(uint64_t val)
+{
+	acpigen_write_store();
+	acpigen_write_integer(val);
+	acpigen_emit_ext_op(DEBUG_OP);
+}
+
+/* Store (op, DEBUG) */
+void acpigen_write_debug_op(uint8_t op)
+{
+	acpigen_write_store();
+	acpigen_emit_byte(op);
+	acpigen_emit_ext_op(DEBUG_OP);
+}
+
+void acpigen_write_if(void)
+{
+	acpigen_emit_byte(IF_OP);
+	acpigen_write_len_f();
+}
+
+/* If (And (arg1, arg2)) */
+void acpigen_write_if_and(uint8_t arg1, uint8_t arg2)
+{
+	acpigen_write_if();
+	acpigen_emit_byte(AND_OP);
+	acpigen_emit_byte(arg1);
+	acpigen_emit_byte(arg2);
+}
+
+/*
+ * Generates ACPI code for checking if operand1 and operand2 are equal, where,
+ * operand1 is ACPI op and operand2 is an integer.
+ *
+ * If (Lequal (op, val))
+ */
+void acpigen_write_if_lequal_op_int(uint8_t op, uint64_t val)
+{
+	acpigen_write_if();
+	acpigen_emit_byte(LEQUAL_OP);
+	acpigen_emit_byte(op);
+	acpigen_write_integer(val);
+}
+
+/*
+ * Generates ACPI code for checking if operand1 and operand2 are equal, where,
+ * operand1 is namestring and operand2 is an integer.
+ *
+ * If (Lequal ("namestr", val))
+ */
+void acpigen_write_if_lequal_namestr_int(const char *namestr, uint64_t val)
+{
+	acpigen_write_if();
+	acpigen_emit_byte(LEQUAL_OP);
+	acpigen_emit_namestring(namestr);
+	acpigen_write_integer(val);
+}
+
+void acpigen_write_else(void)
+{
+	acpigen_emit_byte(ELSE_OP);
+	acpigen_write_len_f();
+}
+
+void acpigen_write_to_buffer(uint8_t src, uint8_t dst)
+{
+	acpigen_emit_byte(TO_BUFFER_OP);
+	acpigen_emit_byte(src);
+	acpigen_emit_byte(dst);
+}
+
+void acpigen_write_to_integer(uint8_t src, uint8_t dst)
+{
+	acpigen_emit_byte(TO_INTEGER_OP);
+	acpigen_emit_byte(src);
+	acpigen_emit_byte(dst);
+}
+
+void acpigen_write_byte_buffer(uint8_t *arr, size_t size)
+{
+	size_t i;
+
+	acpigen_emit_byte(BUFFER_OP);
+	acpigen_write_len_f();
+	acpigen_write_integer(size);
+
+	for (i = 0; i < size; i++)
+		acpigen_emit_byte(arr[i]);
+
+	acpigen_pop_len();
+}
+
+void acpigen_write_return_byte_buffer(uint8_t *arr, size_t size)
+{
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_write_byte_buffer(arr, size);
+}
+
+void acpigen_write_return_singleton_buffer(uint8_t arg)
+{
+	acpigen_write_return_byte_buffer(&arg, 1);
+}
+
+void acpigen_write_return_byte(uint8_t arg)
+{
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_write_byte(arg);
+}
+
+void acpigen_write_return_integer(uint64_t arg)
+{
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_write_integer(arg);
+}
+
+void acpigen_write_return_string(const char *arg)
+{
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_write_string(arg);
+}
+
+void acpigen_write_upc(enum acpi_upc_type type)
+{
+	acpigen_write_name("_UPC");
+	acpigen_write_package(4);
+	/* Connectable */
+	acpigen_write_byte(type == UPC_TYPE_UNUSED ? 0 : 0xff);
+	/* Type */
+	acpigen_write_byte(type);
+	/* Reserved0 */
+	acpigen_write_zero();
+	/* Reserved1 */
+	acpigen_write_zero();
+	acpigen_pop_len();
+}
+
+void acpigen_write_pld(const struct acpi_pld *pld)
+{
+	uint8_t buf[20];
+
+	if (acpi_pld_to_buffer(pld, buf, ARRAY_SIZE(buf)) < 0)
+		return;
+
+	acpigen_write_name("_PLD");
+	acpigen_write_package(1);
+	acpigen_write_byte_buffer(buf, ARRAY_SIZE(buf));
+	acpigen_pop_len();
+}
+
+void acpigen_write_dsm(const char *uuid, void (**callbacks)(void *),
+		       size_t count, void *arg)
+{
+	struct dsm_uuid id = DSM_UUID(uuid, callbacks, count, arg);
+	acpigen_write_dsm_uuid_arr(&id, 1);
+}
+
+static void acpigen_write_dsm_uuid(struct dsm_uuid *id)
+{
+	size_t i;
+
+	/* If (LEqual (Local0, ToUUID(uuid))) */
+	acpigen_write_if();
+	acpigen_emit_byte(LEQUAL_OP);
+	acpigen_emit_byte(LOCAL0_OP);
+	acpigen_write_uuid(id->uuid);
+
+	/* ToInteger (Arg2, Local1) */
+	acpigen_write_to_integer(ARG2_OP, LOCAL1_OP);
+
+	for (i = 0; i < id->count; i++) {
+		/* If (LEqual (Local1, i)) */
+		acpigen_write_if_lequal_op_int(LOCAL1_OP, i);
+
+		/* Callback to write if handler. */
+		if (id->callbacks[i])
+			id->callbacks[i](id->arg);
+
+		acpigen_pop_len();	/* If */
+	}
+
+	/* Default case: Return (Buffer (One) { 0x0 }) */
+	acpigen_write_return_singleton_buffer(0x0);
+
+	acpigen_pop_len();	/* If (LEqual (Local0, ToUUID(uuid))) */
+
+}
+
+/*
+ * Generate ACPI AML code for _DSM method.
+ * This function takes as input array of uuid for the device, set of callbacks
+ * and argument to pass into the callbacks. Callbacks should ensure that Local0
+ * and Local1 are left untouched. Use of Local2-Local7 is permitted in
+ * callbacks.
+ *
+ * Arguments passed into _DSM method:
+ * Arg0 = UUID
+ * Arg1 = Revision
+ * Arg2 = Function index
+ * Arg3 = Function specific arguments
+ *
+ * AML code generated would look like:
+ * Method (_DSM, 4, Serialized) {
+ *	ToBuffer (Arg0, Local0)
+ *	If (LEqual (Local0, ToUUID(uuid))) {
+ *		ToInteger (Arg2, Local1)
+ *		If (LEqual (Local1, 0)) {
+ *			<acpigen by callback[0]>
+ *		}
+ *		...
+ *		If (LEqual (Local1, n)) {
+ *			<acpigen by callback[n]>
+ *		}
+ *		Return (Buffer (One) { 0x0 })
+ *	}
+ *	...
+ *	If (LEqual (Local0, ToUUID(uuidn))) {
+ *	...
+ *	}
+ *	Return (Buffer (One) { 0x0 })
+ * }
+ */
+void acpigen_write_dsm_uuid_arr(struct dsm_uuid *ids, size_t count)
+{
+	size_t i;
+
+	/* Method (_DSM, 4, Serialized) */
+	acpigen_write_method_serialized("_DSM", 0x4);
+
+	/* ToBuffer (Arg0, Local0) */
+	acpigen_write_to_buffer(ARG0_OP, LOCAL0_OP);
+
+	for (i = 0; i < count; i++)
+		acpigen_write_dsm_uuid(&ids[i]);
+
+	/* Return (Buffer (One) { 0x0 }) */
+	acpigen_write_return_singleton_buffer(0x0);
+
+	acpigen_pop_len();	/* Method _DSM */
+}
+
+#define CPPC_PACKAGE_NAME "\\GCPC"
+
+void acpigen_write_CPPC_package(const struct cppc_config *config)
+{
+	u32 i;
+	u32 max;
+	switch (config->version) {
+	case 1:
+		max = CPPC_MAX_FIELDS_VER_1;
+		break;
+	case 2:
+		max = CPPC_MAX_FIELDS_VER_2;
+		break;
+	case 3:
+		max = CPPC_MAX_FIELDS_VER_3;
+		break;
+	default:
+		printk(BIOS_ERR, "ERROR: CPPC version %u is not implemented\n",
+		       config->version);
+		return;
+	}
+	acpigen_write_name(CPPC_PACKAGE_NAME);
+
+	/* Adding 2 to account for length and version fields */
+	acpigen_write_package(max + 2);
+	acpigen_write_dword(max + 2);
+
+	acpigen_write_byte(config->version);
+
+	for (i = 0; i < max; ++i) {
+		const acpi_addr_t *reg = &(config->regs[i]);
+		if (reg->space_id == ACPI_ADDRESS_SPACE_MEMORY &&
+		    reg->bit_width == 32 && reg->access_size == 0) {
+			acpigen_write_dword(reg->addrl);
+		} else {
+			acpigen_write_register_resource(reg);
+		}
+	}
+	acpigen_pop_len();
+}
+
+void acpigen_write_CPPC_method(void)
+{
+	acpigen_write_method("_CPC", 0);
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_emit_namestring(CPPC_PACKAGE_NAME);
+	acpigen_pop_len();
+}
+
+/*
+ * Generate ACPI AML code for _ROM method.
+ * This function takes as input ROM data and ROM length.
+ *
+ * The ACPI spec isn't clear about what should happen at the end of the
+ * ROM. Tests showed that it shouldn't truncate, but fill the remaining
+ * bytes in the returned buffer with zeros.
+ *
+ * Arguments passed into _DSM method:
+ * Arg0 = Offset in Bytes
+ * Arg1 = Bytes to return
+ *
+ * Example:
+ *   acpigen_write_rom(0xdeadbeef, 0x10000)
+ *
+ * AML code generated would look like:
+ * Method (_ROM, 2, NotSerialized) {
+ *
+ *	OperationRegion("ROMS", SYSTEMMEMORY, 0xdeadbeef, 0x10000)
+ *	Field (ROMS, AnyAcc, NoLock, Preserve)
+ *	{
+ *		Offset (0),
+ *		RBF0,   0x80000
+ *	}
+ *
+ *	Store (Arg0, Local0)
+ *	Store (Arg1, Local1)
+ *
+ *	If (LGreater (Local1, 0x1000))
+ *	{
+ *		Store (0x1000, Local1)
+ *	}
+ *
+ *	Store (Local1, Local3)
+ *
+ *	If (LGreater (Local0, 0x10000))
+ *	{
+ *		Return(Buffer(Local1){0})
+ *	}
+ *
+ *	If (LGreater (Local0, 0x0f000))
+ *	{
+ *		Subtract (0x10000, Local0, Local2)
+ *		If (LGreater (Local1, Local2))
+ *		{
+ *			Store (Local2, Local1)
+ *		}
+ *	}
+ *
+ *	Name (ROM1, Buffer (Local3) {0})
+ *
+ *	Multiply (Local0, 0x08, Local0)
+ *	Multiply (Local1, 0x08, Local1)
+ *
+ *	CreateField (RBF0, Local0, Local1, TMPB)
+ *	Store (TMPB, ROM1)
+ *	Return (ROM1)
+ * }
+ */
+
+void acpigen_write_rom(void *bios, const size_t length)
+{
+	ASSERT(bios)
+	ASSERT(length)
+
+	/* Method (_ROM, 2, Serialized) */
+	acpigen_write_method_serialized("_ROM", 2);
+
+	/* OperationRegion("ROMS", SYSTEMMEMORY, current, length) */
+	struct opregion opreg = OPREGION("ROMS", SYSTEMMEMORY,
+			(uintptr_t)bios, length);
+	acpigen_write_opregion(&opreg);
+
+	struct fieldlist l[] = {
+		FIELDLIST_OFFSET(0),
+		FIELDLIST_NAMESTR("RBF0", 8 * length),
+	};
+
+	/* Field (ROMS, AnyAcc, NoLock, Preserve)
+	 * {
+	 *  Offset (0),
+	 *  RBF0,   0x80000
+	 * } */
+	acpigen_write_field(opreg.name, l, 2, FIELD_ANYACC |
+			    FIELD_NOLOCK | FIELD_PRESERVE);
+
+	/* Store (Arg0, Local0) */
+	acpigen_write_store();
+	acpigen_emit_byte(ARG0_OP);
+	acpigen_emit_byte(LOCAL0_OP);
+
+	/* Store (Arg1, Local1) */
+	acpigen_write_store();
+	acpigen_emit_byte(ARG1_OP);
+	acpigen_emit_byte(LOCAL1_OP);
+
+	/* ACPI SPEC requires to return at maximum 4KiB */
+	/* If (LGreater (Local1, 0x1000)) */
+	acpigen_write_if();
+	acpigen_emit_byte(LGREATER_OP);
+	acpigen_emit_byte(LOCAL1_OP);
+	acpigen_write_integer(0x1000);
+
+	/* Store (0x1000, Local1) */
+	acpigen_write_store();
+	acpigen_write_integer(0x1000);
+	acpigen_emit_byte(LOCAL1_OP);
+
+	/* Pop if */
+	acpigen_pop_len();
+
+	/* Store (Local1, Local3) */
+	acpigen_write_store();
+	acpigen_emit_byte(LOCAL1_OP);
+	acpigen_emit_byte(LOCAL3_OP);
+
+	/* If (LGreater (Local0, length)) */
+	acpigen_write_if();
+	acpigen_emit_byte(LGREATER_OP);
+	acpigen_emit_byte(LOCAL0_OP);
+	acpigen_write_integer(length);
+
+	/* Return(Buffer(Local1){0}) */
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_emit_byte(BUFFER_OP);
+	acpigen_write_len_f();
+	acpigen_emit_byte(LOCAL1_OP);
+	acpigen_emit_byte(0);
+	acpigen_pop_len();
+
+	/* Pop if */
+	acpigen_pop_len();
+
+	/* If (LGreater (Local0, length - 4096)) */
+	acpigen_write_if();
+	acpigen_emit_byte(LGREATER_OP);
+	acpigen_emit_byte(LOCAL0_OP);
+	acpigen_write_integer(length - 4096);
+
+	/* Subtract (length, Local0, Local2) */
+	acpigen_emit_byte(SUBTRACT_OP);
+	acpigen_write_integer(length);
+	acpigen_emit_byte(LOCAL0_OP);
+	acpigen_emit_byte(LOCAL2_OP);
+
+	/* If (LGreater (Local1, Local2)) */
+	acpigen_write_if();
+	acpigen_emit_byte(LGREATER_OP);
+	acpigen_emit_byte(LOCAL1_OP);
+	acpigen_emit_byte(LOCAL2_OP);
+
+	/* Store (Local2, Local1) */
+	acpigen_write_store();
+	acpigen_emit_byte(LOCAL2_OP);
+	acpigen_emit_byte(LOCAL1_OP);
+
+	/* Pop if */
+	acpigen_pop_len();
+
+	/* Pop if */
+	acpigen_pop_len();
+
+	/* Name (ROM1, Buffer (Local3) {0}) */
+	acpigen_write_name("ROM1");
+	acpigen_emit_byte(BUFFER_OP);
+	acpigen_write_len_f();
+	acpigen_emit_byte(LOCAL3_OP);
+	acpigen_emit_byte(0);
+	acpigen_pop_len();
+
+	/* Multiply (Local1, 0x08, Local1) */
+	acpigen_emit_byte(MULTIPLY_OP);
+	acpigen_emit_byte(LOCAL1_OP);
+	acpigen_write_integer(0x08);
+	acpigen_emit_byte(LOCAL1_OP);
+
+	/* Multiply (Local0, 0x08, Local0) */
+	acpigen_emit_byte(MULTIPLY_OP);
+	acpigen_emit_byte(LOCAL0_OP);
+	acpigen_write_integer(0x08);
+	acpigen_emit_byte(LOCAL0_OP);
+
+	/* CreateField (RBF0, Local0, Local1, TMPB) */
+	acpigen_emit_ext_op(CREATEFIELD_OP);
+	acpigen_emit_namestring("RBF0");
+	acpigen_emit_byte(LOCAL0_OP);
+	acpigen_emit_byte(LOCAL1_OP);
+	acpigen_emit_namestring("TMPB");
+
+	/* Store (TMPB, ROM1) */
+	acpigen_write_store();
+	acpigen_emit_namestring("TMPB");
+	acpigen_emit_namestring("ROM1");
+
+	/* Return (ROM1) */
+	acpigen_emit_byte(RETURN_OP);
+	acpigen_emit_namestring("ROM1");
+
+	/* Pop method */
+	acpigen_pop_len();
+}
+
+
+/* Soc-implemented functions -- weak definitions. */
+int __weak acpigen_soc_read_rx_gpio(unsigned int gpio_num)
+{
+	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
+	acpigen_write_debug_string("read_rx_gpio not available");
+	return -1;
+}
+
+int __weak acpigen_soc_get_tx_gpio(unsigned int gpio_num)
+{
+	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
+	acpigen_write_debug_string("get_tx_gpio not available");
+	return -1;
+}
+
+int __weak acpigen_soc_set_tx_gpio(unsigned int gpio_num)
+{
+	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
+	acpigen_write_debug_string("set_tx_gpio not available");
+	return -1;
+}
+
+int __weak acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
+{
+	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
+	acpigen_write_debug_string("clear_tx_gpio not available");
+	return -1;
+}
+
+/*
+ * Helper functions for enabling/disabling Tx GPIOs based on the GPIO
+ * polarity. These functions end up calling acpigen_soc_{set,clear}_tx_gpio to
+ * make callbacks into SoC acpigen code.
+ *
+ * Returns 0 on success and -1 on error.
+ */
+int acpigen_enable_tx_gpio(struct acpi_gpio *gpio)
+{
+	if (gpio->polarity == ACPI_GPIO_ACTIVE_HIGH)
+		return acpigen_soc_set_tx_gpio(gpio->pins[0]);
+	else
+		return acpigen_soc_clear_tx_gpio(gpio->pins[0]);
+}
+
+int acpigen_disable_tx_gpio(struct acpi_gpio *gpio)
+{
+	if (gpio->polarity == ACPI_GPIO_ACTIVE_LOW)
+		return acpigen_soc_set_tx_gpio(gpio->pins[0]);
+	else
+		return acpigen_soc_clear_tx_gpio(gpio->pins[0]);
+}
+
+void acpigen_get_rx_gpio(struct acpi_gpio *gpio)
+{
+	acpigen_soc_read_rx_gpio(gpio->pins[0]);
+
+	if (gpio->polarity == ACPI_GPIO_ACTIVE_LOW)
+		acpigen_write_xor(LOCAL0_OP, 1, LOCAL0_OP);
+}
+
+/* refer to ACPI 6.4.3.5.3 Word Address Space Descriptor section for details */
+void acpigen_resource_word(u16 res_type, u16 gen_flags, u16 type_flags, u16 gran,
+	u16 range_min, u16 range_max, u16 translation, u16 length)
+{
+	acpigen_emit_byte(0x88);
+	/* Byte 1+2: length (0x000d) */
+	acpigen_emit_byte(0x0d);
+	acpigen_emit_byte(0x00);
+	/* resource type */
+	acpigen_emit_byte(res_type); // 0 - mem, 1 - io, 2 - bus
+	/* general flags */
+	acpigen_emit_byte(gen_flags);
+	/* type flags */
+	// refer to ACPI Table 6-234 (Memory), 6-235 (IO), 6-236 (Bus) for details
+	acpigen_emit_byte(type_flags);
+	/* granularity, min, max, translation, length */
+	acpigen_emit_word(gran);
+	acpigen_emit_word(range_min);
+	acpigen_emit_word(range_max);
+	acpigen_emit_word(translation);
+	acpigen_emit_word(length);
+}
+
+/* refer to ACPI 6.4.3.5.2 DWord Address Space Descriptor section for details */
+void acpigen_resource_dword(u16 res_type, u16 gen_flags, u16 type_flags,
+	u32 gran, u32 range_min, u32 range_max, u32 translation, u32 length)
+{
+	acpigen_emit_byte(0x87);
+	/* Byte 1+2: length (0023) */
+	acpigen_emit_byte(23);
+	acpigen_emit_byte(0x00);
+	/* resource type */
+	acpigen_emit_byte(res_type); // 0 - mem, 1 - io, 2 - bus
+	/* general flags */
+	acpigen_emit_byte(gen_flags);
+	/* type flags */
+	// refer to ACPI Table 6-234 (Memory), 6-235 (IO), 6-236 (Bus) for details
+	acpigen_emit_byte(type_flags);
+	/* granularity, min, max, translation, length */
+	acpigen_emit_dword(gran);
+	acpigen_emit_dword(range_min);
+	acpigen_emit_dword(range_max);
+	acpigen_emit_dword(translation);
+	acpigen_emit_dword(length);
+}
+
+static void acpigen_emit_qword(u64 data)
+{
+	acpigen_emit_dword(data & 0xffffffff);
+	acpigen_emit_dword((data >> 32) & 0xffffffff);
+}
+
+/* refer to ACPI 6.4.3.5.1 QWord Address Space Descriptor section for details */
+void acpigen_resource_qword(u16 res_type, u16 gen_flags, u16 type_flags,
+	u64 gran, u64 range_min, u64 range_max, u64 translation, u64 length)
+{
+	acpigen_emit_byte(0x8a);
+	/* Byte 1+2: length (0x002b) */
+	acpigen_emit_byte(0x2b);
+	acpigen_emit_byte(0x00);
+	/* resource type */
+	acpigen_emit_byte(res_type); // 0 - mem, 1 - io, 2 - bus
+	/* general flags */
+	acpigen_emit_byte(gen_flags);
+	/* type flags */
+	// refer to ACPI Table 6-234 (Memory), 6-235 (IO), 6-236 (Bus) for details
+	acpigen_emit_byte(type_flags);
+	/* granularity, min, max, translation, length */
+	acpigen_emit_qword(gran);
+	acpigen_emit_qword(range_min);
+	acpigen_emit_qword(range_max);
+	acpigen_emit_qword(translation);
+	acpigen_emit_qword(length);
+}
+
+void acpigen_write_ADR(uint64_t adr)
+{
+	acpigen_write_name_qword("_ADR", adr);
+}
+
+void acpigen_write_ADR_pci_devfn(pci_devfn_t devfn)
+{
+	/*
+	 * _ADR for PCI Bus is encoded as follows:
+	 * [63:32] - unused
+	 * [31:16] - device #
+	 * [15:0]  - function #
+	 */
+	acpigen_write_ADR(PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn));
+}
+
+void acpigen_write_ADR_pci_device(const struct device *dev)
+{
+	assert(dev->path.type == DEVICE_PATH_PCI);
+	acpigen_write_ADR_pci_devfn(dev->path.pci.devfn);
+}
diff --git a/src/acpi/acpigen_dsm.c b/src/acpi/acpigen_dsm.c
new file mode 100644
index 0000000000..ecac3fefb8
--- /dev/null
+++ b/src/acpi/acpigen_dsm.c
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <arch/acpigen.h>
+#include <arch/acpigen_dsm.h>
+
+/* -------------------  I2C HID DSM ---------------------------- */
+
+#define ACPI_DSM_I2C_HID_UUID		"3CDFF6F7-4267-4555-AD05-B30A3D8938DE"
+
+static void i2c_hid_func0_cb(void *arg)
+{
+	/* ToInteger (Arg1, Local2) */
+	acpigen_write_to_integer(ARG1_OP, LOCAL2_OP);
+	/* If (LEqual (Local2, 0x0)) */
+	acpigen_write_if_lequal_op_int(LOCAL2_OP, 0x0);
+	/*   Return (Buffer (One) { 0x1f }) */
+	acpigen_write_return_singleton_buffer(0x1f);
+	acpigen_pop_len();	/* Pop : If */
+	/* Else */
+	acpigen_write_else();
+	/*   If (LEqual (Local2, 0x1)) */
+	acpigen_write_if_lequal_op_int(LOCAL2_OP, 0x1);
+	/*     Return (Buffer (One) { 0x3f }) */
+	acpigen_write_return_singleton_buffer(0x3f);
+	acpigen_pop_len();	/* Pop : If */
+	/*   Else */
+	acpigen_write_else();
+	/*     Return (Buffer (One) { 0x0 }) */
+	acpigen_write_return_singleton_buffer(0x0);
+	acpigen_pop_len();	/* Pop : Else */
+	acpigen_pop_len();	/* Pop : Else */
+}
+
+static void i2c_hid_func1_cb(void *arg)
+{
+	struct dsm_i2c_hid_config *config = arg;
+	acpigen_write_return_byte(config->hid_desc_reg_offset);
+}
+
+static void (*i2c_hid_callbacks[2])(void *) = {
+	i2c_hid_func0_cb,
+	i2c_hid_func1_cb,
+};
+
+void acpigen_write_dsm_i2c_hid(struct dsm_i2c_hid_config *config)
+{
+	acpigen_write_dsm(ACPI_DSM_I2C_HID_UUID, i2c_hid_callbacks,
+			  ARRAY_SIZE(i2c_hid_callbacks), config);
+}
+
+/* ------------------- End: I2C HID DSM ------------------------- */
diff --git a/src/acpi/acpigen_ps2_keybd.c b/src/acpi/acpigen_ps2_keybd.c
new file mode 100644
index 0000000000..7943f9a158
--- /dev/null
+++ b/src/acpi/acpigen_ps2_keybd.c
@@ -0,0 +1,302 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
+#include <arch/acpigen_ps2_keybd.h>
+#include <console/console.h>
+#include <input-event-codes.h>
+
+#define KEYMAP(scancode, keycode) (((uint32_t)(scancode) << 16) | (keycode & 0xFFFF))
+#define SCANCODE(keymap) ((keymap >> 16) & 0xFFFF)
+
+/* Possible keymaps for function keys in the top row */
+static const uint32_t function_keymaps[] = {
+	KEYMAP(0x3b, KEY_F1),
+	KEYMAP(0x3c, KEY_F2),
+	KEYMAP(0x3d, KEY_F3),
+	KEYMAP(0x3e, KEY_F4),
+	KEYMAP(0x3f, KEY_F5),
+	KEYMAP(0x40, KEY_F6),
+	KEYMAP(0x41, KEY_F7),
+	KEYMAP(0x42, KEY_F8),
+	KEYMAP(0x43, KEY_F9),
+	KEYMAP(0x44, KEY_F10),
+	KEYMAP(0x57, KEY_F11),
+	KEYMAP(0x58, KEY_F12),
+	KEYMAP(0x59, KEY_F13),
+	KEYMAP(0x5a, KEY_F14),
+	KEYMAP(0x5b, KEY_F15),
+};
+
+/*
+ * Possible keymaps for action keys in the top row. This is a superset of
+ * possible keys. Individual keyboards will have a subset of these keys.
+ * The scancodes are true / condensed 1 byte scancodes from set-1
+ */
+static const uint32_t action_keymaps[] = {
+	[PS2_KEY_BACK] = KEYMAP(0xea, KEY_BACK),		/* e06a */
+	[PS2_KEY_FORWARD] = KEYMAP(0xe9, KEY_FORWARD),		/* e069 */
+	[PS2_KEY_REFRESH] = KEYMAP(0xe7, KEY_REFRESH),		/* e067 */
+	[PS2_KEY_FULLSCREEN] = KEYMAP(0x91, KEY_FULL_SCREEN),	/* e011 */
+	[PS2_KEY_OVERVIEW] = KEYMAP(0x92, KEY_SCALE),		/* e012 */
+	[PS2_KEY_VOL_MUTE] = KEYMAP(0xa0, KEY_MUTE),		/* e020 */
+	[PS2_KEY_VOL_DOWN] = KEYMAP(0xae, KEY_VOLUMEDOWN),	/* e02e */
+	[PS2_KEY_VOL_UP] = KEYMAP(0xb0, KEY_VOLUMEUP),		/* e030 */
+	[PS2_KEY_PLAY_PAUSE] = KEYMAP(0x9a, KEY_PLAYPAUSE),	/* e01a */
+	[PS2_KEY_NEXT_TRACK] = KEYMAP(0x99, KEY_NEXTSONG),	/* e019 */
+	[PS2_KEY_PREV_TRACK] = KEYMAP(0x90, KEY_PREVIOUSSONG),	/* e010 */
+	[PS2_KEY_SNAPSHOT] = KEYMAP(0x93, KEY_SYSRQ),		/* e013 */
+	[PS2_KEY_BRIGHTNESS_DOWN] = KEYMAP(0x94, KEY_BRIGHTNESSDOWN),/* e014 */
+	[PS2_KEY_BRIGHTNESS_UP] = KEYMAP(0x95, KEY_BRIGHTNESSUP),    /* e015 */
+	[PS2_KEY_KBD_BKLIGHT_DOWN] = KEYMAP(0x97, KEY_KBDILLUMDOWN), /* e017 */
+	[PS2_KEY_KBD_BKLIGHT_UP] = KEYMAP(0x98, KEY_KBDILLUMUP),     /* e018 */
+	[PS2_KEY_PRIVACY_SCRN_TOGGLE] = KEYMAP(0x96,		     /* e016 */
+					  KEY_PRIVACY_SCREEN_TOGGLE),
+};
+
+/* Keymap for numeric keypad keys */
+static uint32_t numeric_keypad_keymaps[] = {
+	/* Row-0 */
+	KEYMAP(0xc9, KEY_PAGEUP),
+	KEYMAP(0xd1, KEY_PAGEDOWN),
+	KEYMAP(0xc7, KEY_HOME),
+	KEYMAP(0xcf, KEY_END),
+	/* Row-1 */
+	KEYMAP(0xd3, KEY_DELETE),
+	KEYMAP(0xb5, KEY_KPSLASH),
+	KEYMAP(0x37, KEY_KPASTERISK),
+	KEYMAP(0x4a, KEY_KPMINUS),
+	/* Row-2 */
+	KEYMAP(0x47, KEY_KP7),
+	KEYMAP(0x48, KEY_KP8),
+	KEYMAP(0x49, KEY_KP9),
+	KEYMAP(0x4e, KEY_KPPLUS),
+	/* Row-3 */
+	KEYMAP(0x4b, KEY_KP4),
+	KEYMAP(0x4c, KEY_KP5),
+	KEYMAP(0x4d, KEY_KP6),
+	/* Row-4 */
+	KEYMAP(0x4f, KEY_KP1),
+	KEYMAP(0x50, KEY_KP2),
+	KEYMAP(0x51, KEY_KP3),
+	KEYMAP(0x9c, KEY_KPENTER),
+	/* Row-5 */
+	KEYMAP(0x52, KEY_KP0),
+	KEYMAP(0x53, KEY_KPDOT),
+};
+
+/*
+ * Keymap for rest of non-top-row keys. This is a superset of all the possible
+ * keys that any chromeos keyboards can have.
+ */
+static uint32_t rest_of_keymaps[] = {
+	/* Row-0 */
+	KEYMAP(0x01, KEY_ESC),
+	/* Row-1 */
+	KEYMAP(0x29, KEY_GRAVE),
+	KEYMAP(0x02, KEY_1),
+	KEYMAP(0x03, KEY_2),
+	KEYMAP(0x04, KEY_3),
+	KEYMAP(0x05, KEY_4),
+	KEYMAP(0x06, KEY_5),
+	KEYMAP(0x07, KEY_6),
+	KEYMAP(0x08, KEY_7),
+	KEYMAP(0x09, KEY_8),
+	KEYMAP(0x0a, KEY_9),
+	KEYMAP(0x0b, KEY_0),
+	KEYMAP(0x0c, KEY_MINUS),
+	KEYMAP(0x0d, KEY_EQUAL),
+	KEYMAP(0x7d, KEY_YEN),		/* JP keyboards only */
+	KEYMAP(0x0e, KEY_BACKSPACE),
+	/* Row-2 */
+	KEYMAP(0x0f, KEY_TAB),
+	KEYMAP(0x10, KEY_Q),
+	KEYMAP(0x11, KEY_W),
+	KEYMAP(0x12, KEY_E),
+	KEYMAP(0x13, KEY_R),
+	KEYMAP(0x14, KEY_T),
+	KEYMAP(0x15, KEY_Y),
+	KEYMAP(0x16, KEY_U),
+	KEYMAP(0x17, KEY_I),
+	KEYMAP(0x18, KEY_O),
+	KEYMAP(0x19, KEY_P),
+	KEYMAP(0x1a, KEY_LEFTBRACE),
+	KEYMAP(0x1b, KEY_RIGHTBRACE),
+	KEYMAP(0x2b, KEY_BACKSLASH),
+	/* Row-3 */
+	KEYMAP(0xdb, KEY_LEFTMETA),	/* Search Key */
+	KEYMAP(0x1e, KEY_A),
+	KEYMAP(0x1f, KEY_S),
+	KEYMAP(0x20, KEY_D),
+	KEYMAP(0x21, KEY_F),
+	KEYMAP(0x22, KEY_G),
+	KEYMAP(0x23, KEY_H),
+	KEYMAP(0x24, KEY_J),
+	KEYMAP(0x25, KEY_K),
+	KEYMAP(0x26, KEY_L),
+	KEYMAP(0x27, KEY_SEMICOLON),
+	KEYMAP(0x28, KEY_APOSTROPHE),
+	KEYMAP(0x1c, KEY_ENTER),
+	/* Row-4 */
+	KEYMAP(0x2a, KEY_LEFTSHIFT),
+	KEYMAP(0x56, KEY_102ND),	/* UK keyboards only */
+	KEYMAP(0x2c, KEY_Z),
+	KEYMAP(0x2d, KEY_X),
+	KEYMAP(0x2e, KEY_C),
+	KEYMAP(0x2f, KEY_V),
+	KEYMAP(0x30, KEY_B),
+	KEYMAP(0x31, KEY_N),
+	KEYMAP(0x32, KEY_M),
+	KEYMAP(0x33, KEY_COMMA),
+	KEYMAP(0x34, KEY_DOT),
+	KEYMAP(0x35, KEY_SLASH),
+	KEYMAP(0x73, KEY_RO),		/* JP keyboards only */
+	KEYMAP(0x36, KEY_RIGHTSHIFT),
+	/* Row-5 */
+	KEYMAP(0x1d, KEY_LEFTCTRL),
+	KEYMAP(0x38, KEY_LEFTALT),
+	KEYMAP(0x7b, KEY_MUHENKAN),	/* JP keyboards only */
+	KEYMAP(0x39, KEY_SPACE),
+	KEYMAP(0x79, KEY_HENKAN),	/* JP keyboards only */
+	KEYMAP(0xb8, KEY_RIGHTALT),
+	KEYMAP(0x9d, KEY_RIGHTCTRL),
+	/* Arrow keys */
+	KEYMAP(0xcb, KEY_LEFT),
+	KEYMAP(0xd0, KEY_DOWN),
+	KEYMAP(0xcd, KEY_RIGHT),
+	KEYMAP(0xc8, KEY_UP),
+};
+
+static void ssdt_generate_physmap(struct acpi_dp *dp, uint8_t num_top_row_keys,
+				  enum ps2_action_key action_keys[])
+{
+	struct acpi_dp *dp_array;
+	enum ps2_action_key key;
+	uint32_t keymap, i;
+
+	dp_array = acpi_dp_new_table("function-row-physmap");
+	if (!dp_array) {
+		printk(BIOS_ERR, "PS2K: couldn't write function-row-physmap\n");
+		return;
+	}
+
+	printk(BIOS_INFO, "PS2K: Physmap: [");
+	for (i = 0; i < num_top_row_keys; i++) {
+		key = action_keys[i];
+		if (key && key < ARRAY_SIZE(action_keymaps)) {
+			keymap = action_keymaps[key];
+		} else {
+			keymap = 0;
+			printk(BIOS_ERR,
+			       "PS2K: invalid top-action-key-%u: %u(skipped)\n",
+			       i, key);
+		}
+		acpi_dp_add_integer(dp_array, NULL, SCANCODE(keymap));
+		printk(BIOS_INFO, " %X", SCANCODE(keymap));
+	}
+
+	printk(BIOS_INFO, " ]\n");
+	acpi_dp_add_array(dp, dp_array);
+}
+
+static void ssdt_generate_keymap(struct acpi_dp *dp, uint8_t num_top_row_keys,
+				 enum ps2_action_key action_keys[],
+				 bool can_send_function_keys,
+				 bool has_numeric_keypad,
+				 bool has_scrnlock_key)
+{
+	struct acpi_dp *dp_array;
+	enum ps2_action_key key;
+	uint32_t keymap;
+	unsigned int i, total = 0;
+
+	dp_array = acpi_dp_new_table("linux,keymap");
+	if (!dp_array) {
+		printk(BIOS_ERR, "PS2K: couldn't write linux,keymap\n");
+		return;
+	}
+
+	/* Write out keymap for top row action keys */
+	for (i = 0; i < num_top_row_keys; i++) {
+		key = action_keys[i];
+		if (!key || key >= ARRAY_SIZE(action_keymaps)) {
+			printk(BIOS_ERR,
+			       "PS2K: invalid top-action-key-%u: %u\n", i, key);
+			continue;
+		}
+		keymap = action_keymaps[key];
+		acpi_dp_add_integer(dp_array, NULL, keymap);
+		total++;
+	}
+
+	/* Write out keymap for function keys, if keyboard can send them */
+	if (can_send_function_keys) {
+		for (i = 0; i < num_top_row_keys; i++) {
+			keymap = function_keymaps[i];
+			acpi_dp_add_integer(dp_array, NULL, keymap);
+		}
+
+		total += num_top_row_keys;
+	}
+
+	/* Write out keymap for numeric keypad, if the keyboard has it */
+	if (has_numeric_keypad) {
+		for (i = 0; i < ARRAY_SIZE(numeric_keypad_keymaps); i++) {
+			keymap = numeric_keypad_keymaps[i];
+			acpi_dp_add_integer(dp_array, NULL, keymap);
+		}
+
+		total += ARRAY_SIZE(numeric_keypad_keymaps);
+	}
+
+	/* Provide keymap for screenlock only if it is present */
+	if (has_scrnlock_key) {
+		acpi_dp_add_integer(dp_array, NULL, KEYMAP(0x5d, KEY_SLEEP));
+		total++;
+	}
+
+	/* Write out keymap for rest of keys */
+	for (i = 0; i < ARRAY_SIZE(rest_of_keymaps); i++) {
+		keymap = rest_of_keymaps[i];
+		acpi_dp_add_integer(dp_array, NULL, keymap);
+	}
+
+	total += ARRAY_SIZE(rest_of_keymaps);
+	printk(BIOS_INFO, "PS2K: Passing %u keymaps to kernel\n", total);
+
+	acpi_dp_add_array(dp, dp_array);
+}
+
+void acpigen_ps2_keyboard_dsd(const char *scope, uint8_t num_top_row_keys,
+			      enum ps2_action_key action_keys[],
+			      bool can_send_function_keys,
+			      bool has_numeric_keypad,
+			      bool has_scrnlock_key)
+{
+	struct acpi_dp *dsd;
+
+	if (!scope ||
+	    num_top_row_keys < PS2_MIN_TOP_ROW_KEYS ||
+	    num_top_row_keys > PS2_MAX_TOP_ROW_KEYS) {
+		printk(BIOS_ERR, "PS2K: %s: invalid args\n", __func__);
+		return;
+	}
+
+	dsd = acpi_dp_new_table("_DSD");
+	if (!dsd) {
+		printk(BIOS_ERR, "PS2K: couldn't write _DSD\n");
+		return;
+	}
+
+	acpigen_write_scope(scope);
+	ssdt_generate_physmap(dsd, num_top_row_keys, action_keys);
+	ssdt_generate_keymap(dsd, num_top_row_keys, action_keys,
+			     can_send_function_keys, has_numeric_keypad,
+			     has_scrnlock_key);
+	acpi_dp_write(dsd);
+	acpigen_pop_len(); /* Scope */
+}