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authorDaisuke Nojiri <dnojiri@chromium.org>2014-10-21 11:18:20 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-10 07:42:18 +0200
commit93d8e3c487b00bbc7beede33d47505f5b989fd8e (patch)
tree25c5c17629dc6c69894c8f0ef68c4e8e750c354a /src/arch/arm/armv7
parente32b6e71967c4a8deaa31955dc49009631d1f495 (diff)
downloadcoreboot-93d8e3c487b00bbc7beede33d47505f5b989fd8e.tar.xz
armv7-m: add armv7-m configuration
this change adds armv7-m configuration for bootblock and verstage. BUG=none TEST=Built cosmos, daisy_spring, falco, lumpy, nyan, nyan_blaze, rush_ryu, storm, veyron_pinky BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ib2496e33d5690c91c8fff0f101ec31837c8809bc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 34b838ebdcb0506799d86b64204f54a171114304 Original-Change-Id: I1c899d8969b1f8d0fa4cff617099d222bc4b4f4b Original-Reviewed-on: https://chromium-review.googlesource.com/224772 Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: http://review.coreboot.org/9379 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm/armv7')
-rw-r--r--src/arch/arm/armv7/Kconfig6
-rw-r--r--src/arch/arm/armv7/Makefile.inc57
-rw-r--r--src/arch/arm/armv7/bootblock_simple.c1
-rw-r--r--src/arch/arm/armv7/exception_m.c36
4 files changed, 78 insertions, 22 deletions
diff --git a/src/arch/arm/armv7/Kconfig b/src/arch/arm/armv7/Kconfig
index aa188e2764..0ab3542fff 100644
--- a/src/arch/arm/armv7/Kconfig
+++ b/src/arch/arm/armv7/Kconfig
@@ -13,3 +13,9 @@ config ARCH_ROMSTAGE_ARMV7
config ARCH_RAMSTAGE_ARMV7
def_bool n
select ARCH_RAMSTAGE_ARM
+config ARCH_BOOTBLOCK_ARMV7_M
+ def_bool n
+ select ARCH_BOOTBLOCK_ARM
+config ARCH_VERSTAGE_ARMV7_M
+ def_bool n
+ select ARCH_VERSTAGE_ARM
diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc
index dac4276bbe..951118a2d7 100644
--- a/src/arch/arm/armv7/Makefile.inc
+++ b/src/arch/arm/armv7/Makefile.inc
@@ -19,16 +19,21 @@
##
###############################################################################
-armv7_flags = -march=armv7-a -mthumb \
- -I$(src)/arch/arm/include/armv7/ -D__COREBOOT_ARM_ARCH__=7
-armv7_asm_flags = $(armv7_flags) -Wa,-mthumb -Wa,-mimplicit-it=always \
- -Wa,-mno-warn-deprecated
+armv7_flags = -mthumb -I$(src)/arch/arm/include/armv7/ -D__COREBOOT_ARM_ARCH__=7
+armv7-a_flags = -march=armv7-a $(armv7_flags)
+armv7-m_flags = -march=armv7-m $(armv7_flags)
+
+armv7_asm_flags = -Wa,-mthumb -Wa,-mimplicit-it=always -Wa,-mno-warn-deprecated
+armv7-a_asm_flags = $(armv7-a_flags) $(armv7_asm_flags)
+armv7-m_asm_flags = $(armv7-m_flags) $(armv7_asm_flags)
###############################################################################
# bootblock
###############################################################################
ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y)
+bootblock-c-ccopts += $(armv7-a_flags)
+bootblock-S-ccopts += $(armv7-a_asm_flags)
ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
bootblock-y += bootblock.S
@@ -41,8 +46,14 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S
bootblock-y += mmu.c
-bootblock-c-ccopts += $(armv7_flags)
-bootblock-S-ccopts += $(armv7_asm_flags)
+else ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7_M),y)
+bootblock-c-ccopts += $(armv7-m_flags)
+bootblock-S-ccopts += $(armv7-m_asm_flags)
+
+ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
+bootblock-y += bootblock_simple.c
+bootblock-y += exception_m.c
+endif
endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
@@ -50,23 +61,27 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
## verification stage
################################################################################
-ifeq ($(CONFIG_ARCH_VERSTAGE_ARM_V7),y)
+ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7),y)
+verstage-c-ccopts += $(armv7-a_flags)
+verstage-S-ccopts += $(armv7-a_asm_flags)
-verstage-c-ccopts += $(armv7_flags)
-verstage-S-ccopts += $(armv7_asm_flags)
verstage-y += cache.c
verstage-y += cpu.S
verstage-y += exception.c
verstage-y += exception_asm.S
verstage-y += mmu.c
-endif # CONFIG_ARCH_VERSTAGE_ARMV7
+else ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7_M),y)
+verstage-c-ccopts += $(armv7-m_flags)
+verstage-S-ccopts += $(armv7-m_asm_flags)
-###############################################################################
-# romstage
-###############################################################################
+endif # CONFIG_ARCH_VERSTAGE_ARMV7_M
+################################################################################
+## ROM stage
+################################################################################
ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y)
+>>>>>>> 34b838e... armv7-m: add armv7-m configuration
romstage-y += cache.c
romstage-y += cpu.S
@@ -75,11 +90,11 @@ romstage-y += exception_asm.S
romstage-y += mmu.c
romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
-romstage-c-ccopts += $(armv7_flags)
-romstage-S-ccopts += $(armv7_asm_flags)
+romstage-c-ccopts += $(armv7-a_flags)
+romstage-S-ccopts += $(armv7-a_asm_flags)
-rmodules_arm-c-ccopts += $(armv7_flags)
-rmodules_arm-S-ccopts += $(armv7_asm_flags)
+rmodules_arm-c-ccopts += $(armv7-a_flags)
+rmodules_arm-S-ccopts += $(armv7-a_asm_flags)
endif # CONFIG_ARCH_ROMSTAGE_ARMV7
@@ -96,10 +111,10 @@ ramstage-y += exception_asm.S
ramstage-y += mmu.c
ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
-ramstage-c-ccopts += $(armv7_flags)
-ramstage-S-ccopts += $(armv7_asm_flags)
+ramstage-c-ccopts += $(armv7-a_flags)
+ramstage-S-ccopts += $(armv7-a_asm_flags)
# All rmodule code is armv7 if ramstage is armv7.
-rmodules_arm-c-ccopts += $(armv7_flags)
-rmodules_arm-S-ccopts += $(armv7_asm_flags)
+rmodules_arm-c-ccopts += $(armv7-a_flags)
+rmodules_arm-S-ccopts += $(armv7-a_asm_flags)
endif # CONFIG_ARCH_RAMSTAGE_ARMV7
diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c
index 96f2445f57..450e5b437b 100644
--- a/src/arch/arm/armv7/bootblock_simple.c
+++ b/src/arch/arm/armv7/bootblock_simple.c
@@ -19,7 +19,6 @@
* MA 02110-1301 USA
*/
-#include <arch/cache.h>
#include <arch/exception.h>
#include <arch/stages.h>
#include <bootblock_common.h>
diff --git a/src/arch/arm/armv7/exception_m.c b/src/arch/arm/armv7/exception_m.c
new file mode 100644
index 0000000000..d76cc6a739
--- /dev/null
+++ b/src/arch/arm/armv7/exception_m.c
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <arch/exception.h>
+#include <console/console.h>
+
+void exception_init(void)
+{
+ printk(BIOS_DEBUG, "Exception handlers not installed.\n");
+}