arm: Thumb ALL the things!

This patch switches every last part of Coreboot on ARM over to Thumb
mode: libpayload, the internal libgcc, and assorted assembly files. In
combination with the respective depthcharge patch, this will switch to
Thumb mode right after the entry point of the bootblock and not switch
back to ARM until the final assembly stub that jumps to the kernel.

The required changes to make this work include some new headers and
Makefile flags to handle assembly files (using the unified syntax and
the same helper macros as Linux), modifying our custom-written libgcc
code for 64-bit division to support Thumb (removing some stale old files
that were never really used for clarity), and flipping the general
CFLAGS to Thumb (some more cleanup there as well while I'm at it).

BUG=None
TEST=Snow and Nyan still boot.

Original-Change-Id: I80c04281e3adbf74f9f477486a96b9fafeb455b3
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/182212
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 5f65c17cbfae165a95354146ae79e06c512c2c5a)

Conflicts:
	payloads/libpayload/include/arm/arch/asm.h
	src/arch/arm/Makefile.inc
	src/arch/arm/armv7/Makefile.inc

*** There is an issue with what to do with ramstage-S-ccopts, and
*** will need to be covered in additional ARM cleanup patches.

Change-Id: I80c04281e3adbf74f9f477486a96b9fafeb455b3
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/6930
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2 files changed, 16 insertions, 17 deletions

diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc
index 4f3e75789c..01069c4462 100644
--- a/src/arch/arm/armv7/Makefile.inc
+++ b/src/arch/arm/armv7/Makefile.inc
@@ -19,8 +19,10 @@
 ##
 ###############################################################################
 
-armv7_flags = -march=armv7-a -mthumb -mthumb-interwork \
+armv7_flags = -march=armv7-a -mthumb \
 	-I$(src)/arch/arm/include/armv7/ -D__COREBOOT_ARM_ARCH__=7
+armv7_asm_flags = $(armv7_flags) -Wa,-mthumb -Wa,-mimplicit-it=always \
+	-Wa,-mno-warn-deprecated
 
 ###############################################################################
 # bootblock
@@ -40,7 +42,7 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S
 bootblock-y += mmu.c
 
 bootblock-c-ccopts += $(armv7_flags)
-bootblock-S-ccopts += $(armv7_flags)
+bootblock-S-ccopts += $(armv7_asm_flags)
 
 endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
 
@@ -57,7 +59,7 @@ romstage-y += exception_asm.S
 romstage-y += mmu.c
 
 romstage-c-ccopts += $(armv7_flags)
-romstage-S-ccopts += $(armv7_flags)
+romstage-S-ccopts += $(armv7_asm_flags)
 
 endif # CONFIG_ARCH_ROMSTAGE_ARMV7
 
@@ -74,6 +76,6 @@ ramstage-y += exception_asm.S
 ramstage-y += mmu.c
 
 ramstage-c-ccopts += $(armv7_flags)
-ramstage-S-ccopts += $(armv7_flags)
+ramstage-S-ccopts += $(armv7_asm_flags)
 
 endif # CONFIG_ARCH_RAMSTAGE_ARMV7
diff --git a/src/arch/arm/armv7/bootblock.S b/src/arch/arm/armv7/bootblock.S
index a8d0973034..4258caf439 100644
--- a/src/arch/arm/armv7/bootblock.S
+++ b/src/arch/arm/armv7/bootblock.S
@@ -32,6 +32,7 @@
 #include <arch/asm.h>
 
 .section ".start", "a", %progbits
+.arm
 ENTRY(_start)
 	/*
 	 * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
@@ -40,7 +41,11 @@ ENTRY(_start)
 	 * causes it.
 	 */
 	msr	cpsr_cxf, #0xdf
+	bl	_thumb_start
+ENDPROC(_start)
 
+.thumb
+ENTRY(_thumb_start)
 	/*
 	 * From Cortex-A Series Programmer's Guide:
 	 * Only CPU 0 performs initialization. Other CPUs go into WFI
@@ -72,25 +77,17 @@ call_bootblock:
 	ldr	sp, .Stack /* Set up stack pointer */
 	ldr	r0,=0x00000000
 	 /*
-	  * The current design of cpu_info places the
-	  * struct at the top of the stack. The number of
-	  * words pushed must be at least as large as that
-	  * struct.
+	  * The current design of cpu_info places the struct at the top of the
+	  * stack. Free enough space to accomodate for that, but make sure it's
+	  * 8-byte aligned for ABI compliance.
 	  */
-	push	{r0-r2}
-	bic	sp, sp, #7 /* 8-byte alignment for ABI compliance */
-	/*
-	 * Use "bl" instead of "b" even though we do not intend to return.
-	 * "bl" gets compiled to "blx" if we're transitioning from ARM to
-	 * Thumb. However, "b" will not and GCC may attempt to create a
-	 * wrapper which is currently broken.
-	 */
+	sub	sp, sp, #16
 	bl	main
 
 wait_for_interrupt:
 	wfi
 	mov	pc, lr			@ back to my caller
-ENDPROC(_start)
+ENDPROC(_thumb_start)
 
 /* we do it this way because it's a 32-bit constant and
  * in some cases too far away to be loaded as just an offset