diff options
| author | Julius Werner <jwerner@chromium.org> | 2015-08-20 14:36:34 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-08-28 06:46:09 +0000 |
| commit | 4bfa29e94788df12c5845adeb8d5fb915db89541 (patch) | |
| tree | 0862a4d58834c093c0ee1cd423148faf10ec6794 /src/arch/arm64/Kconfig | |
| parent | 3d092303e399a388aeb483dbedc64cee5222ac8b (diff) | |
| download | coreboot-4bfa29e94788df12c5845adeb8d5fb915db89541.tar.xz | |
arm64: xcompile: Add support for A53 erratum 843419
This patch adds support to enable a linker workaround to a hardware
erratum on some early Cortex-A53 revisions. Since the linker option was
added very recently, we use xcompile to test whether the toolchain
supports it first. It is also guarded by a Kconfig since only a few
ARM64 SoCs will need this and it incurs a performance penalty.
BRANCH=none
BUG=none
TEST=Turned it on or off for Smaug and confirmed that it (dis)appeared
in verbose make output accordingly.
Change-Id: I01c9642d3cf489134645f0db6f79f1c788ddb00d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 57128785760c4dfa32d6e6d764756443a9323cb7
Original-Change-Id: Ia5dd124f484e38460d75fb864304e7e8b18d16b7
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294745
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11403
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/arch/arm64/Kconfig')
| -rw-r--r-- | src/arch/arm64/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index b7cdc12168..f2adf5c6b6 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -55,3 +55,12 @@ config ARM64_SECURE_OS_FILE depends on ARM64_USE_SECURE_OS help Secure OS binary file. + +config ARM64_A53_ERRATUM_843419 + bool + default n + help + Some early Cortex-A53 revisions had a hardware bug that results in + incorrect address calculations in rare cases. This option enables a + linker workaround to avoid those cases if your toolchain supports it. + Should be selected automatically by SoCs that are affected. |