diff options
author | Joseph Lo <josephl@nvidia.com> | 2015-04-14 16:03:58 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-27 07:44:49 +0200 |
commit | c4301f79691995dfedb56cb3e20adea3ecd8f596 (patch) | |
tree | 798d7561c82ce946ebca4e81028b8d178440d5bc /src/arch/arm64/armv8/Makefile.inc | |
parent | 53a2f6078ac28738b6b52148eb8d90b2fc4132b5 (diff) | |
download | coreboot-c4301f79691995dfedb56cb3e20adea3ecd8f596.tar.xz |
arm64: introduce data cache ops by set/way to the level specified
This patchs introduces level specific data cache maintenance operations
to cache_helpers.S. It's derived form ARM trusted firmware repository.
Please reference here.
https://github.com/ARM-software/arm-trusted-firmware/blob/master/
lib/aarch64/cache_helpers.S
BRANCH=none
BUG=none
TEST=boot on smaug/foster
Change-Id: Ib58a6d6f95eb51ce5d80749ff51d9d389b0d1343
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b3d1a16bd0089740f1f2257146c771783beece82
Original-Change-Id: Ifcd1dbcd868331107d0d47af73545a3a159fdff6
Original-Signed-off-by: Joseph Lo <josephl@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/265826
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9979
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/arch/arm64/armv8/Makefile.inc')
-rw-r--r-- | src/arch/arm64/armv8/Makefile.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/arm64/armv8/Makefile.inc b/src/arch/arm64/armv8/Makefile.inc index 5532b47a14..d04392155c 100644 --- a/src/arch/arm64/armv8/Makefile.inc +++ b/src/arch/arm64/armv8/Makefile.inc @@ -37,6 +37,7 @@ bootblock-y += bootblock.S bootblock-y += bootblock_simple.c endif bootblock-y += cache.c +bootblock-y += cache_helpers.S bootblock-y += cpu.S bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c @@ -52,6 +53,7 @@ ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV8_64),y) verstage-y += cache.c verstage-y += cpu.S +verstage-y += cache_helpers.S verstage-y += exception.c verstage-c-ccopts += $(armv8_flags) @@ -65,6 +67,7 @@ endif ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV8_64),y) romstage-y += cache.c +romstage-y += cache_helpers.S romstage-y += cpu.S romstage-y += exception.c @@ -82,6 +85,7 @@ endif ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV8_64),y) ramstage-y += cache.c +ramstage-y += cache_helpers.S ramstage-y += cpu.S ramstage-y += exception.c ramstage-y += mmu.c |