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authorJimmy Huang <jimmy.huang@mediatek.com>2015-07-31 17:10:49 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-12-03 14:16:55 +0100
commit857829654c6e519a2165916d6596b5060b7b6aca (patch)
tree7028bce9050767208f65780142ef6562a266e08f /src/arch/arm64/armv8/Makefile.inc
parent9b423a77d171a7f18ef0eb6bb98daf56eeb1da62 (diff)
downloadcoreboot-857829654c6e519a2165916d6596b5060b7b6aca.tar.xz
arch/arm64: introduce mmu to bootblock and romstage
We need mmu interfaces in these two stages for, 1. bootblock: to support mmu initialization in bootblock 2. romstage: to be able to add dram range to mmu table BRANCH=none BUG=none TEST=build pass Change-Id: I56dea5f958a48b875579f546ba17a5dd6eaf159c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: cf72736bda2233f8e0bdd7a8ca3245f1d941ee86 Original-Change-Id: I1e27c0a0a878f7bc0ff8712bee640ec3fd8dbb8b Original-Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292665 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/12585 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/arm64/armv8/Makefile.inc')
-rw-r--r--src/arch/arm64/armv8/Makefile.inc3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm64/armv8/Makefile.inc b/src/arch/arm64/armv8/Makefile.inc
index 53d0e46d37..f026a99b23 100644
--- a/src/arch/arm64/armv8/Makefile.inc
+++ b/src/arch/arm64/armv8/Makefile.inc
@@ -30,6 +30,8 @@ endif
bootblock-y += cache.c
bootblock-y += cache_helpers.S
bootblock-y += cpu.S
+bootblock-y += mmu.c
+
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c
bootblock-generic-ccopts += $(armv8_flags)
@@ -65,6 +67,7 @@ romstage-y += cache.c
romstage-y += cache_helpers.S
romstage-y += cpu.S
romstage-y += exception.c
+romstage-y += mmu.c
romstage-generic-ccopts += $(armv8_flags)